Pulse generator for synchronizing or resetting electronic signals without requiring separate external sourc

Cancro, C. A.

Janniche, P. J., Jr.

English

NASA Technical Reports Server

REPLY TO 
ATTN OF: GP 
NATIONAL AERONAUTICS AND SPACE ADMINISTRATION 
WASHINGTON, D.C. 20546 
March 30 ,  1971 
TO: USI /Sc ien t i f i c  & Technica l  Informat ion  Division 
At t en t ion :  M i s s  Winnie M. Morgan 
FROM t GP/Office of A s s i s t a n t  General  
Counsel f o r  P a t e n t  Matters 
SUBJECT: Announcement of NASA-Owned 
U.S. Patents i n  STAR 
I n  accordance w i t h  t h e  procedures  conta ined  i n  t h e  Code GP 
t o  Code US1 memorandum on t h i s  subject, da t ed  June 8, 1970, 
t h e  a t t a c h e d  NASA-owned U.S. patent i s  be ing  forwarded for  
a b s t r a c t i n g  and announcement i n  NASA STAR. 
The fo l lowing  in fo rma t ion  i s  provided: 
U.S. Patent  N o .  : 3,390,282 
Corporate Source : Goddard Space F l i g h t  Center 
Supplementary 
Corporate Source . 
NASA P a t e n t  C a s e  NO.: XGS-03632 
G a y h  Pa rke r  
Enclosure: 
Copy of P a t e n t  
(ACCES 
1 
NASA-HQ 
(NASA CR O R  TMX OR AD NUMBER) 
https://ntrs.nasa.gov/search.jsp?R=19710013835 2020-03-17T03:04:02+00:00Z
June 25, 1968 C. A. CANCRO ETAL 3,390,282 
PASSIVE SYNCHRONIZED SPIKE GENERATOR WITH HIGH INPUT 
IMPEDANCE AND LOW OUTPUT IMPEDANCE 
ER SUPPLY 
Filed Oc s-Sheef 1 
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June 25, 1968 C. A. CANCRO ETAL 3,390,282 
PASSIVE SYNCHRONIZED SPIKE GENERATOR WITH HIGH INPUT 
IMPEDANCE AND LOW OUTPUT IMPEDANCE 
AND CAPACITOR POWER SUPPLY 
Filed Oct.  22, 1965 2 Sheets-Sheet 2 
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INVENTORS 
Ciro A. Cancro, 
Paul J. Jannkhe 
3,39~,2$2 tates Patent 0 Ce June 25, 1968 
1 2 
The output spike may be derived from either the lead- 
ing or trailing edges of the rectangular input signal depend- 
ing upon the polarity of the diodes and the type of 
transistors used. The point during the rise and fall times 
5 of the input signal at which the spike is generated is de- 
termined by the type and number of diodes used in the 
discharge transistor base circuit. In addition, a tunnel 
diode may be used to supply the input to the transistor 
amplifier stages in order to provide an extremely fast 
lo spike independently of the input signal rise time. The cir- 
cuit may be adapted to operated on input signal pulses 
with a single polarity swing, such as from common to posi- 
tive or common to negative, or one that is part positive 
and part negative. 
n u s ,  it is a primary object of the present invention to 
Provide a sharp differentiating network with high input 
impedance and IOW output impedance using zero external 
Power and yielding an output spike whose rise time is in- 
dependent of the input Pulse rise or fall time. 
Other and further objects Of the present invention will 
become apparent with the following detailed description 
when taken in view of the appended drawings in which: 
FIGURE 1 is a schematic illustration of a pulse gen- 
erator according to the present invention. 
FIGURE 2 is a schematic illustration of yet another 
embodiment of the present invention. 
FIGURE 3 is a schematic illustration of yet a third em- 
The invention described herein may be manufactured bodiment Of the present invention* 
and used by or for the Government of the United States of Referring now to the drawings in detail, there is shown 
America for governmental purposes without the payment 30 in FIGURE 1 a first embodiment of the invention which 
of any royalties thereon or therefor. generates a positive spike during the fall time interval of 
The present invention relates to a pulse circuit for gen- a rectangular input signal. The generator, generally indi- 
erating fast rise time pulses, or spikes, in response to the cated as 109 comprises an input terminal 12, an Output 
leading or trailing edges of a rectangular input signal terminal 14 and a pair Of common terminals 16. A high 
having relatively slow rise and €all times. 35 value resistor 18 is connected to input terminal 12 and 
In generating pulses with rise times in the nanosecond feeds a charging signal to capacitor 20 through a forward 
range, the present practice is to feed the input biased diode 22. A PNP discharge transistor 24 has its 
to an emitter follower, differentiate the output of this emitter electrode connected to one side of said capacitor 
emitter follower and then amplify it. Then feed this am- 20 and its base Circuit connected through a pair of diodes 
plifier differentiated signal through another emitter fo]- 40 26 and 28 to the junction of resistor 18 and diode 22. 
lower stage for developing an output signal with impedance The output or collector electrode of transistor 24 is 
matching. It is apparent that these generators include connected to the control circuit of the first amplifier NPN 
relatively complicated circuitry. Moreover, a Source of tramistor 30 which is in turn cascaded, through current 
external power is required for each amplifier stage. An- limiting resistor 60, with a second PNP amplifier stage 
other disadvantage with these prior generators is that the 45 32. Transistors 30 and 32 receive their operating voltage 
output pulse is dependent upon the shape (slope) of the from the charge on capacitor 20 due to the connection 
input pulse and is not independent thereof. made by leads 34 and 36 and resistor 38. The output of 
It is a general purpose of the present invention to gen- transistor 32 is connected to the output terminal 14, and 
crate a fast rise-time pulse, or spike, synchronized with resistors 61 and 62 determine the gain for transistors 30 
the leading or trailing edge of a rectangular input pulse so and Of resistors 61 and set the 
which has relatively slow rise and fall times but which circuit gain between l4 and 
output pulse has a rise time which is independent of the In operation, assume an input pulse is applied which 
input rise or fall times or shapes. Moreover, the generat- swings from zero to -k6 and back to again* 
ing circuit of the present invention has a high input im- During the time the input signal remains at $6 volts 
pendance and a low ouiput impdance as well as a zero 65 Capacitor 20 charges through resistor 18 and forward 
power train. biased diode 22. The large value of resistor 18 insures a large input impedance for thec ircuit, and the value of 
prises a high impedance network including a diode and a C is chosen such that the RC time constant permits C to 
resistor for charging a capacitor. When the input signal charge to approximately the full +6 volts during the 
is applied, charge on the iapacitor builds up and is re- 0" expected input pulse period* 
tained and an associated discharge transistor is biased off. With the input signal at +6 volts, all transistors are 
m e n  the input signal drops to a specified level, diodes in biased off and the capacitor 20, once charged, retains its 
the discharge transistor base circuit become forward charge due to the absence of a discharge circuit. When 
biased, causing it to conduct. The signal out of the dis- the input signal drops from 3-6 volts to approximately 
charge transistor is amplified by additional transistor am- e5 +4 volts, diodes 26 and 28 become forward biased and 
plifier stages to provide a sharply rising input signal or at this time, transistor 24 becomes fully conductive. The 
spike. The effective supply voltage for the transistor am- signal through transistor 24 immediatley turns on ampli- 
plifying stages is obtained from the charge of the capac- fier stages 30 and 32 so that a sharply rising output pulse 
itor which drains exponentially through the transistors, is fed to the output terminal 14. It can be seen that the 
resulting in a corresponding exponential fall in the spike 'O effective supply voltage for amplifiers 30 and 32 is 
generated. obtained from the charge on capacitor 20 which quickly 
3,396),282 
PASSIVE SYNCHRONIZED SPIKE GENERA- 
TOR WITH HIGH ENPUT IMPEDANCE 
AND CAPACITOR QeTTpUT POWER S IMPEDANCE AND 
Ciro A. Cancro, Silver Spring, and Paul J. Jmnicbe, Jr., 
Lanlharn, Md., assignors to the United States of America 
as represented by the Administrator of the National 
Aeronautics and Space Administration 
Filed Oct. 22, 1965, Ser. No. 502,739 
10 CIaims. (CL 307-260) 
ABSTRACT OF THE DZSCLOSURE 
A pulse generator for synchronizing or resetting elec- 15 
tranic signals without requiring a separate external power 
source. A storage capacitor stores energy from incoming 
signals, such energy being utilized to power the pulse gen- 
erator circuitry. By charging the storage capacitor, trig- 
gering a discharge circuit when the input pulse drops to a 'LO 
predetermined level, and developing the output pulse 
though an amplifier stage which is connected directly to 
said storage capacitor, the output pulse is rendered in- 
dependent of the input pulse and the pulse generator 
needs no external power source. 28 
Thus, the 
~ ~ i ~ f l ~  stated, a circuit of the present invention 
3,396),282 
3 
drains through transistors 30 and 32 so that the trailing bias supplied by the voltage across capacitor 52, transis- 
edge of the output pulse falls exponentially. tors 30 and 32 rapidly conduct thereby emitting a fast 
The circuit of FIGURE 1 yields an output spike at the rise time output pulse at terminal 14. 
fall time of a positive going input signal. However, an It should be understood that the embodiment disclosed 
output spike may be obtained on the rise time of a 6 herein are examples only of the present invention and 
negative going input pulse by reversing the polarities of that modifications can be made thereto without departing 
all diodes and changing the NPN-PNP designations of the from the spirit and scope of the present invention. 
transistors. The point during the fall or rise time of the What is claimed is: 
input signal at which an output spike is obtained is deter- 1. A pulse circuit for generating fast rise time pulses 
mined by the forward voltage drop across diodes 26 and comprising an input terminal; an output terminal and a 
28, and this point may be adjusted by changing the num- common terminal; a first capacitor having a first electrode 
ber of diodes used in the base circuit of transistor 24 or coupled to said common terminal and a second electrode; 
alternatively, if stability is desired, a Zener diode can be a first diode coupled between said input terminal and said 
substituted in place of diodes 26 and 28. second electrode to provide a charging path for said ca- 
Referring now to FIGURE?, 2, there is illustrated a 15 pacitor when the input signal at said input terminal is 
second embodiment of the present invention which gen- of a predetermined polarity; a normally nonconducting 
erates a spike at the fall time of the input pulse, said discharge device having a control electrode, an input elec- 
spike having a rise time of approximately 100 nano- trode connected to said second electrode, and an output 
seconds and being independent of the input signal rise or electrode; a normally nonconducting two terminal device 
fall time. It should be understood that like reference 20 coupled between said control electrode and the coupling 
numerals refer to like structures and the circuit of FIG- between said first diode and said input terminal for mak- 
URE 2 is similar to that shown in FIGURE 1 except ing said discharge device conductive when the voltage 
that capacitor 20 is replaced by capacitors 40 and 42, and across said two terminal device reaches a predetermined 
tunnel diode 44 is connected across the input of amplifier magnitude and polarity; and an amplifier stage having an 
30. Resistor 63 is connected between the collector of 25 input lead coupled to said discharge device output elec- 
transistor 24 and tunnel diode 44 and its value determines trode, a voltage Supply lead coupled to said second elec- 
the operating point of the tunnel diode. m e n  charged, trode, and an output lead coupled to said output terminal. 
the voltage across capacitor 40 is fed through resistor 46 2. A pulse circuit as set forth in claim 1 further com- 
to the base of the transistor 38 and biases the Same near prising a resistor connected in series between said input 
conduction. Blocking capacitor 48 is connected between 30 terminal and said first diode. 
resistor 46 and tunnel diode 44 so that the voltage felt 3. A pulse circuit as set forth in claim 1 wherein said 
through resistor 46 does not prematurely switch tunnel two terminal device is a Zener diode having one of its 
diode 44 to its high voltage state. Zener diode 50 is con- electrodes connected to the corresponding poled electrode 
nected in the base circuit of transistor 24 and determines of said first diode. 
the point on the input signal fall time at which transistor 35 4. A pulse circuit as set forth in claim 1 wherein said 
24 conducts and therefore the point at which an output discharge device comprises a first transistor with its emit- 
spike is obtained, ter connected to said discharge device input electrode, 
When a 6 volt rectangular input signal is applied to collector coupled to said discharge device output elec- 
input terminal 12, capacitors 40 and 42 charge to the 6 trode, and base connected to said discharge device control 
volt level in a manner described above. Discharge transis- 80 electrode and wherein said amplifier stage comprises at 
tor 24 conducts at a point of the fall time of the trailing least one second transistor with its base coupled to said 
edge of the input pulse determined by the characteristics input lead, and having one of its emitter-collector elec- 
of the Zener diode 50. The fast and independent output trodes coupled to said voltage supply lead and the other 
pulse rise time is obtained by the fast switching of tunnel of its emitter-collector electrodes coupled to said output 
diode 44 to its high voltage state in response to the con- 45 terminal. 
duction of transistor 24. Thus, the switching signal is fed 5. A pulse circuit as set forth in claim 1 further com- 
into the control or base electrode of the first transistor prising another capacitor coupled between said amplifier 
stage 30 so that transistors 30 and 32 produce the fast Output lead and said common terminal to bias said ampli- 
rise time output pulse at terminal 14. fier stage near conduction, another diode coupled between 
The tunnel diode circuit described above and shown in 5o said input terminal and said another capacitor for provid- 
FIGURE 2 operates on an input pulse with a single ing a charging path for said another capacitor, a negative 
polarity swing, such as from zero to a positive voltage or resistance device having one electrode coupled to said 
from a zero voltage to a negative voltage (with appro- amplifier input lead and another electrode connected to 
priate polarity reversals). Yet another embodiment of said common terminal, said diodes poled so that said first 
the present invention is illustrated in FIGURE 3 wherein 55 capacitor charges when the signal at said input terminal 
the circuit generates a spike in response to input voltages is of one polarity and said another capacitor charges when 
swinging from one polarity to an opposite polarity, and the signal at said input terminal is of an opposite polarity. 
wherein the output spike rise time is about 100 nano- 6.  A pulse circuit as set forth in claim 5 wherein said 
seconds and independent of the input signal rise or fall negalive resistance device is a tunnel diode. 
time. In this embodiment, bias resistor 47 is connected 60 7. A pulse circuit as set forth in claim 1 wherein said 
between the base of transistor 30 and common terminal two terminal device is a second diode having one of its 
16 and a capacitor 52 is connected in the emitter circuit electrodes connected to the oppositely poled electrode of 
of the first transistor amplifier 30. Capacitor 52 is charged said first diode. 
during the negative portion of the input pulse through a 8. A pulse circuit as set forth in claim 1 wherein said 
high value resistor 54 and a forward biased diode 56. 65 discharge device comprises a first transistor with its emit- 
The voltage across capacitor 52 biases transistor 30 near ter connected to said discharge device input electrode, 
conduction. During the positive portion of the input pulse, collector connected to said discharge device output elec- 
capacitor 20 charges in the manner described above for trode, and base connected to said discharge device control 
the circuit shown in FIGURE 1. electrode and wherein said amplifier stage comprises a 
In operation, at the trailing edge (negative going) of first transistor with its base connected directly to said dis- 
the input pulse, discharge transistor 24 begins conducting charge device output electrode, one of its emitter-collec- 
at a point determined by Zener diode 48. Tunnel diode 44 tor electrodes connected through a resistor to said voltage 
is immediately switched to its high voltage state and a supply lead and the other of its emitter-collector elec- 
sharp trigger signal is then fed to transistor 30. Due to the 75 trodes coupled to said amplifier output terminal, a second 
3,390,282 
5 
transistor having a base electrode coupled to said one of 
said emitter-collector electrodes, and emitter connected 
directly to said amplifier voltage supply lead and a col- 
lector connected directly to said amplifier output terminal. 
9. A pulse circuit as set forth in claim 1 further com- 
prising a second capacitor connected between said first 
electrode of said first capacitor and said common termi- 
nal, means connected between said amplifier input lead 
and the junction between said first capacitor and said 
second capacitor for feeding at least a part of the voltage 
on said second capacitor to said amplifier input lead, and 
a negative resistance device having one electrode coupled 
6 
to said amplifier input lead and another electrode con- 
nected to said common terminal. 
10. A pulse circuit as set forth in claim 9 wherein said 
negative resistance device i s  a tunnel diode. 
5 References Cited 
UNITED STATES PATENTS 
2,686,263 8/1954 Konick _ _ _ _ _ _ _ _ _ _  328-67 XR 
10 ARTHUR GAUSS, Primary Examiner. 
S .  D. MILLER, Assisfmt Examiner. 


Passive synchronized spike generator with high input impedance and low output impedance and capacitor power supply Patent

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