Transistorized dc-coupled multivibrator with noninverted output signa

Pan, F. M.

English

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November 6, 1970 
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Elizabeth A. Carter 
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https://ntrs.nasa.gov/search.jsp?R=19710009248 2020-03-17T02:47:13+00:00Z
March ' 17. 1970 JAMES E. WEBB 3,501,649 - 
- ADMINISTRATOR OF THE NATIONAL AERONAUTICS 
AND SPACE ADh$@LISTRATlON ---.. . 
DC-COUaED NONTPIZRTING ONE-SHOT -- 
. .- Filed May 17, 1967 \ 
i 
CRI 
I 1 - 7 I - 
F I G .  2 
'iH 7
INPUT PULSE 
L l N E  a 
. . 
OUTPUT PULSE L lNE b 
/- ! I,/ 
I 
VB(ON) 
L lNE c i A' INVENTOR 
FRANCIS M. PAN 
eY 9s- 
4 d - P -  
ATTORNEYS 
United States Patent 06 3,501,649 ce Patented Mar. 17, 1970 
1 2 
BRIEF DESCRIPTION OF TWE FIGURES 
3,501,649 
DC-COUPLED NONINVERTING ONE-SHOT FIGURE 1 is a schematic diagram of one embodiment 
James E. Webb, Adn~i~tistrator f the National Aeronao- the 
tics and Soace Administration. vvitl~ reswect to an inven- FIGURE 2 is a schematic diagram of another enibodi- 
tion of ~ i a n c i s  M. Pan, Los ~ngcles ,~Calif .  5 ment of the invention; and 
Filed May 17, 1967. Ser. No. 640,459 FIGURE 3 is a waveform diagram useful in explaining 
Int. CI. H03k 3/28 the mode of operation of the present invention. 
U.S. C1. 307-273 6 Clain~s 
DESCRIPTION OF THE PREFERRED 
10 EMBODIMENTS 
ABSTRACT OF THE DISCLOSURE Attention is directed to FIGURE 1 in which one em- 
A one-shot providing an output at the collector of a bodiment of the invention is diagrammed. It includes a 
transistor which is of the same polaiity as the controlling transistor Q l  which for exemplary purposes, it shown as 
input level. The duration of the outpulse is a function being of the NPN type. The transistor comp~ises a col- 
of the time required for a capacitor to charge up to a l5 lector, shown connected to one output terminal 10, the 
level at which the transistor is driven to conduction. other terminal 11 being shown connected to a reference 
The capacitor is not connected between the transistor and potential such as ground. The emitter of Q1 is connected 
the input source, so that the one-shot may be thought of to a bias potential designated EZ, while the base is con- 
as DC coupled. nected to the collector, through serially connected R1 
20 and R2. Also. the base is connected to a bias ootential 
The invention described herein was made in the per- E l ,  through parallel connected ~3 and capacfitor ~ 1 .  
formance of work under a NASA contract and is A diode CR1 is connected across R1, with the anode 
to the provisions of Section 305 of the National A ~ ~ ~ -  thereof connected to the collector and the cathode to 
nautics and Space Act of 1958, Public Law 85-568 (72 25 a junction point 13, which also defines an input terminal 
Stat. 435; 42 USC 2457). of the circuit. Another input terminal 14 is connected 
tn ground. -- n - - - - - -  
BACKGROUND OF THE INVENTION A source of inout simals. aenerallv designated bv 
Description of the prior art numeral 15 is connected-between terminal 13 and 14. 
The internal impedance of source 15 is diagrammed by 
Practically all timing or discriminating circuits known 30 resistors ~ i .  ~h~ low and high input levels, provided by 
as one-shot multivibrators employ either a ~lurality of source 15 are desigllated in FIGURE 1 by vLL and VjH 
active elements, such as transistors or are AC (alternating respectively. The impedance of source 15 when levels vIL 
current) coupled by means of a capacitor between the and VIH are provided will hereafter be referred to as RiL 
source of the input signal and the transistor. Also, prior and R ~ H  respectively. 
one-shot multivibrators provide an output signal which 35 
~ ~ i ~ f l ~ ,  when the output level of 1 5  is low, 
is generally inverted, potentialwise with respect to the transistor Q1 is cut off and the output level at the collector 
input signal. Either or both features are often undesirable. or terminal 10 is equal to the input level, plus 
the voltage drop across diode CR1. Then, when the input 
OBJECTS AND SUMMARY OF THE INVENTION level is switched to VIH, transistor Q1 is switched to 
4U 
It is an object of the invention to provide a new simple conduction to generate a single output pulse whose length is a function of capacitor C1. 
one-shot multivibrator. 
Another object is the provision of a transistorized one- When the input level is ViL, transistor Q1 is cut off 
shot multivibrator which provides a noninverted output and capacitor is charged a "Iue V~ Off, where 
signal. 45 V ,  off (Max.) sE2(Min.)  (1) 
- 
A further object is the provision of a one-shot nlulti- Neglecting the leakage currellts in transistor Q1, as 
vibrator which employs a single transistot and provides will be assumed hereafter, VB off can be expressed as 
a noninverted output signal. 
Still a further bbject is to provide a one-shot multi- E l ( R 2 f  R iL )  +R3Tlil+R3RiLT~,,,j 
vibrator which is directly coupled to a source of input 50 " B  " f f =  R2+RiL+R3 
signals and provides a noninverted output signal. 
(2)  
Another object is to provide a one-shot multivibrator where ILoad is the collector current. 
which derives its power source from the input pulse. In the cutoff state, the output voltage may be expressed 
These and other objects are achieved by a single tran- 
sistor circuit in which the collector, forming the output 55 VOut(OFF) 
terminal is connected to the base through resistors. One R ~ L ( R ~ + R ~ ) Z L ~ ~ ~ +  ( R 2 + R 3 ) l r i ~ + E l R i I ~  
resistor is shunted by a diode, the cathode of which is = I T c n ,  $. -- -. R2S  R3+RiL 
connected to a source of input signals, with the anode 
connected to the collector. The diode is forward biased (3 )  
when the transistor is cut off while being reversed biased 60 When the level of source 15 rises to ViK cliode, GRI  
when the ti-ansistor is conducting. The emitter in one is reverse biased, but the collector level follows the level 
embodiment is connected to source of bias potential. 111 of the source 15 through R1. Thus, the output level rises 
t i le s:lme ernhoc!imenl, the base is also connected throll~rh together with the rise in the input level, resulting in a 
a capacitor to a second bias potential, while in another non-inverted output pulse. The oi~tput level may be desig- 
embodiment the emitter is directly connected to ;I refer- 65 nated VOut(,,. However, the input level at the base does 
ence potential such as grorrud, and the base is connected not increase suddenly since the voltage across the capac- 
to ground through the capacitor. itor C l  cannot change instantaneously. The capacitor 
The novel features that are considered characteristic tends to charge up towards a value VB which may be 
of this invention are set forth with particularity in the defined as 
appended claims. The invention will best be understood 70 
fro111 the following description when read in connection l , rg (~ua . )=  ( R ~ $ R ~ H ) E ~ + R ~ V ~ R  ----- - 
with the accompanying drawings. R2+ R3$ RiH (4 )  
3,501,649 
3 4 
The lime constant 'T', i s  first jurrction point whereby said first and secontl 
1 ~ 3 ( 1 i 2 ~ ~ - R ~ i I I ) C l  resistors are connected in series across the collector T =. - -- - .-  - 
R3+122i-l2iII to base junction of said transistor; (') 
a diode connected in parallel across said first resistor; 
As the base voltage rises, when it reaches a vaille ca~acitor having one end connected to said base elec- 
E z + v ~ ~ ( ~ f f ) ,  where VBE(off) is the base to emitter voltage trode; and 
as Q l  starts to come out of the cutoff region and is means connecting said emitter electrode and a second 
switched into conduction. As a result, the collector level end of said capacitor to at least one reference po- 
drops to ~out(oN~=E2+VcE(ofr) ,  where VCE(ON) is the tentid, said first junction point being adapted to re- 
collector to emitter voltage drop when Q1 conducts. Thus, 10 ceive an input pulse of a selected polarity, whereby 
the duration of the output pulse is limited to the time the level of said collector changes in the direction 
required for the capacitor C1 to charge to a voltage at of the polarity of said input pulse for a duration, 
which Q1 is switched into conduction. which is a function of the time required for said 
In another embodiment, the need for bias potentials transistor to switch to a conductive state. 
E l  and E2 may be eliminated by connecting the emitter, 15 2. The transistorized circuit as recited in claim B where- 
as well as, C1 and R3 to ground potential. Such an in said input pulse is directly supplied to the base e!ectrode 
arrangement is shown in FIGURE 2 in which elements, through said second resistor, the time required for said 
like those shown in FIGURE 1, are designated by like transistor to switch to said conductive state being a func- 
numerals. In such an arrangement no power source other tion of the time required for said capacitor to reach a 
than input source 15 is required. % preselected potential which is a function of the potential 
Reference is now made to FIGURE 3 which is a wave- at said emitter electrode. 
form diagram useful i n  summarizing the invention. 3. The transistorized circuit as recited in claim 2 where- 
In line a of FIGURE 3, an input pulse from source in said emitter electrode is connected to a first potential 
15 is diagrammed, while line b represents the output and said capacitor is connected to a second potential, said 
level at the collector of QI. Line c represents the change 25 circuit further including a third resistor connected across 
in the base voltage or level. As seen, when the input said capacitor, the time required for said capacitor to 
level is ViL, the base voltage is VB(off) and the output reach said preselected potential being a function of said 
level Voutlofft. Then, when the input level rises to VIH, second and third resistors and the capacitance of said 
the output Ievel also rises to Vout(H), while the capacitor capacitor. 
starts to charge up towards VB(Max,p However, when 30 4. The transistorized circuit as recited in claim 3 where- 
the level VB(ON) is reached after a time TD, the transistor in said transistor is an NPN type transistor, and said diode 
Q1 is switched to conduction and the output level drops k i n g  forward biased when said transistor is in a non- 
to VoUt(ON). Thus, the duration of the output pulse conductive state and reversed biased when said transistor 
(line b) equals the time required for the capacitor or is in a conductive state. 
base voltage to increase from VB(0ff) to V B ( ~ N ) .  35 5. The transistorized circuit as recited in claim 2 where- 
In light of the foregoing, it is seen that the circuit of in said emitter electrode and said capacitor are connected 
the invention provides a single output pulse of the same to a common reference potential, said circuit further 
polarity as the input pulse. Also, since the capacitor including a third resistor connected across said capacitor, 
C1 is not connected between the input source 1 5  and the time required for said capacitor to reach said pre- 
the transistor Ql ,  the circuit may be thought of as a DC selected potential being a function of said second and 
coupled circuit. Although the circuit has been described third resistors and the capacitance of said capacitor. 
in conjunction with an NPN transistor, the teachings are 6.  The transistorized circuit as recited in claim 5 where- 
applicable to a circuit with a PNP transistor. in said transistor is an NPN type transistor, and said diode 
There has accordingly been shown and described herein, being forward biased when said transistor is in a non- 
a simple single transistor D C  coupled one-shot multi- conductive state and reversed biased when said transistor 
vibrator providing a non-inverted output pulse in response is in a conductive state. 
to an input pulse. It  should be appreciated that those 
familiar with the art may make modifications in the References Cited 
arrangement without depirting from the spirit of the 
invention. Therefore, all such modifications are deemed 60 UNITED STATES PATENTS 
to fall within the scope of the invention as defined in 3~067,344 12'1962 Branun? et 
the appended claims. 3,219,838 11/1965 Hurst ----- - -------- 307-269 
what is claimed is: 
1. A transistorized circuit comprising: DONALD D. FORRER, Primary Examiner 
a transistor having collector, base and emitter elec- 53  J. D. FREW, Assistant Examiner 
trode; 
a first resistor connected to said collector electrodes: U.S. CI. X.R. 
a second resistor connected to said base electrode; 307-246, 293; 328-207 
means connecting the first and second resistors at a 


A dc-coupled noninverting one-shot Patent

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