Film deposition of cermet resistors on same chip with metal nitride oxide silicon field effect transistors permits protection of contamination sensitive active devices from contaminants produced in cermet deposition and definition processes. Additional advantages include lower cost, greater reliability, and space savings

Brown, G. A.

Harrap, V.

English

NASA Technical Reports Server

October 1971
	 Brief 71:.10375 
NASA TECH BRIEF 
Goddard Space Flight Center 
NASA Tech Briefs announce new technology derived from the U.S. space program. They are issued to encourage 
commercial application. Tech Briefs are available on a subscription basis from the National Technical Information 
Service, Springfield, Virginia 22151. Requests for individual copies or questions relating to the Tech Brief program may 
be directed to the Technology Utilization Office, NASA, Code KT, Washington, D.C. 20546. 
Use of Cermet Thin Film Resistors with Nitride Passivated Metal

Insulator Field Effect Transistor 
Composite ceramic-metal (cermet) resistors have 
been successfully film-deposited on chip-substrated 
metal-nitride-oxide-silicon field effect transistors 
(MNOSFET's). These thin film load resistors were 
produced on a single chip by compatible processes 
and were found to suffer less degradation after elec-
tron radiation than conventional metal oxide semi-
conductor field effect transistors (MOSFET's) pre-
viously tested. 
The bi-layer silicon nitride-silicon dioxide gate 
insulators employed were equivalent in capacitance 
to only SOOA of SiO, .and exhibited much greater 
reliability than a single agate insulator of 500A of 
silicon dioxide alone, which is difficult to produce in 
high yield. Successful placement of the cermet resistor 
on the same chip with the active transistor circuitry 
was possible because the silicon nitride, which forms 
an integral part of the active devices, is also an 
effective barrier to a wide variety of ionic species 
(hydrogen, oxygen, nitro gen). Thus, the contamination-
sensitive active devices are protected from con-
taminants that are produced in the cermet deposition 
and definition processes. 
Notes: 
• Important advantages in terms of lower cost, 
greater reliability, and space savings are realized 
by combining the active and passive circuit ele-
ments on a single chip. For the particular circuit
constructed, a function space saving of a factor 
of five over the circuit plus discrete load resistor 
should be realized. 
2. The following documentation is available from: 
National Technical Information Service 
Springfield, Virginia 22151 
Single document price $3.00 
(or microfiche $0.95) 
Reference: 
NASA-CR-97459 (N69-10283), Development 
of Silicon Nitride and Cermet Resistors 
for use in a Binary Counter, Metal Insulator 
Field Effect Transistor Circuit. 
Patent status: 
This invention is owned by NASA, and a patent 
application has been filed. Royalty-free nonexclusive 
licenses for its commercial use will be granted by 
NASA. Inquiries concerning license rights should be 
made to: 
Patent Counsel 
Mail Code 204 
Goddard Space Flight Center 
Greenbelt, Maryland 20771 
Source: G. A. Brown and V. Harrap of

Texas Instruments, Inc.

Goddard Space Flight Center

(GSC- 10835) 
Category 08 
This document was prepared under the sponsorship of the National 
Aeronautics and Space Administration. Neither the United States 
Government nor any person acting on behalf of the United States
Government assumes any liability resulting from the use of the 
information contained in this document, or warrants that such use 
will be free from privately owned rights.
https://ntrs.nasa.gov/search.jsp?R=19710000373 2020-03-17T02:29:11+00:00Z


Use of cermet thin film resistors with nitride passivated metal insulator field effect transistor

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