Silicon contact for area reduction of integrated circuit

Lin, H. C.

English

NASA Technical Reports Server

September 1971
	 Brief 71-10368 
S	
NASA TECH BRIEF 
Marshall Space Flight Center
	 -4:v 
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be directed to the Technology Utilization Office, NASA, Code KT, Washington, D.C. 20546. 
Silicon Contact for Area Reduction of Integrated Circuits 
The problem: 
In the design of integrated circuits, the contacts 
are normally made smaller in area than the diffused 
semiconductor in order to minimize the possibility 
of contact between the metal and those areas whose 
Misaliqnment	 .
 
-Contact
junction with the background material even if 
misalignment occurs. 
How it's done: 
The schematic of Fig. 2 shows a metal oxide 
semiconductor (MOS) transistor in which the 
N	 Junction
I\\	 1taal 
Contact 
P Source	 I	 I	 PDrain	 I	 Diffused 
	
1	 N Source 
N Substrate 
Figure 1. Doped Silicon Contact Does Not Cause 
Shorts Due to Misalignment. 
conductivity type is opposite that of the diffused 
semiconductor. Such contact could occur during 
misalignment. Aluminum is universally used as the 
interconnecting metal, and the aluminum work func-
tion is comparable to that of silicon. An alloyed 
aluminum contact, then, makes good ohmic connec-
tion with P-type silicon; but a leaky reverse junc-
tion occurs with the N-type silicon. For N-channel 
MOS transistors, the alloyed aluminum will cause 
a short circuit if it comes in contact with the P-type 
substrate. Because the reduction in contact area is 
not completely effective, undesirable metal contact 
can still occur. 
The solution: 
A semiconductor (e.g., doped silicon) contact is 
used in place of the metal contact (see Fig. 1). 
The semiconductor contact forms a low leakage
P Substrate 
Figure 2. Epitaxial Growth Increases Radius 
of Curvature of Diffused Front. 
contact windows are opened through the oxide after 
diffusion steps are completed. (The windows may 
be the same size as the diffused area.) Silicon, doped 
in the same conductivity type as that of the diffused 
area, is epitaxially deposited through the windows. 
For MOS integrated circuits, the N-doped silicon 
contact is ohmic to the N-type diffused source 
and drain (not shown), but is rectifying to the P-
type background (substrate). The rectifying junction 
between the N contact and the reverse-biased P-
type background results in very low leakage current. 
The leakage current can be further minimized by 
increasing the radius df curvature of the N -P 
junction at the edge of the N contact (dashed hue). 
If the silicon contact is grown epitaxially at high 
temperature (1523 K), diffusion will occur, and the 
radius of curvature will be increased.
(Ctiiiliiittcti oscrIaI) 
This document was prepared under the sponsorship of the National 
Aeronautics and Space Administration. Neither the United States 
Government nor any person acting on behalf of the United States
Government assumes any liability resulting from the use of the 
information contained in this document, or warrants that such use 
will be free from privately owned rights.
https://ntrs.nasa.gov/search.jsp?R=19710000366 2020-03-17T02:29:15+00:00Z
Technology Utilization Officer 
Code A&TS-TU 
Marshall Space Flight Center 
Huntsville, Alabama 35812 
Reference: TSP7I-10368
Patent status: 
No patent action is contemplated by NASA. 
Source: H. C. Lin of

Westinghouse Electric Corp.

under contract to

Marshall Space Flight Center

(M FS-20688)
Note: 
Requests for further information may be directed 
'4:
S 
. 
Brief 71-10368	 Category 01


Silicon contact for area reduction of integrated circuits

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