Extrapolation tables for the control of silicon transistor product reliability have been compiled. The tables are based on a version of the Arrhenius statistical relation and are intended to be used for low- and medium-power silicon transistors

Toye, C. R.

English

NASA Technical Reports Server

December 1968	 Brief 68-10541 
NASA TECH BRIEF 
NASA Tech Briefs are issued to summarize specific innovations derived from the U.S. space program, 
to encourage their commercial application. Copies are available to the public at 15 cents each 
from the Clearinghouse for Federal Scientific and Technical Information, Springfield, Virginia 22151. 
Failure Rates for Accelerated Acceptance Testing of Silicon Transistors 
Extrapolation tables for the control of silicon tran- which low- and medium-power silicon transistors are 
sistor product reliability have been compiled in a life-tested and at which there exists a relation to oper-
Handbook of Extrapolated Lambda Sampling Plans for ating life tests. Operating derating curves between 
Silicon Transistors. The tables are based on a version maximum rated dissipation and 200°C are usually 
of the Arrhenius statistical relation and are intended available from semiconductor manufacturers. 
to be used for low- and medium-power silicon transis- The tables contain failure rate values (%/l00 hours) 
tors as an extension of the lambda sampling plans for confidence limits of 10, 60, 70, 80 and 90%. The 
contained in MIL-S-19500 (Table C-I). The purpose 60% and 90% values are the ones most commonly re-
of the extrapolating tables is twofold: first, to bridge ferred to; the 10% value is presented for information 
the gap between the life-test failure-rate lambda value purposes only. 
selected at maximum rated test conditions and that ex- The tables can be used in either of two ways. First, 
.	 pected at derated operating levels; and second, to pro- having selected a lambda value at maximum thermal 
vide a guideline for estimating economic sample sizes, test conditions, one can obtain the maximum expected 
The Arrhenius relation was chosen as the means of failure rate (%/1000 hours) at "in-use" conditions 
extrapolating because of theoretical consideration re- by matching the derated "in-use" temperature (°C) 
lated to the physical—chemical 	 reactions of silicon with the desired level of confidence (%). Second, the 
transistor materials under conditions of varying tem- tables may be used in an inverse fashion. For example, 
perature and because it is the most widely published knowing the failure rate required for a derated "in-
and accepted extrapolation procedure in the semicon- use" condition, one can obtain an appropriate sam-
ductor industry. The acceleration factor of 7.5
	 x pling plan that would give the necessary assurance at 
1030 K used in the construction of the extrapolation maximum rating. If there were a large range of fail-
tables is a conservative estimate; the value was derived ure rates required, more than one sampling plan might 
on the basis of a literature search, be acceptable. In that case, cost considerations would 
The extrapolation tables become meaningful pro- be the determining factor in selecting the most satis-
vided that the units which comprise the test sample factory plan. 
pass the appropriate sampling plan and are selected Note: 
from a population that has been 100% screened for Copies of the Handbook are available from: 
latent and potential failures attributable to
	
proc- Clearinghouse for Federal Scientific 
essing and/or workmanship discrepancies. and Technical Information 
There is an extrapolation table corresponding to Springfield, Virginia 22151 
each sampling plan in Table C- I of fhe MIL-S-19500. Price $3.00 
The tables are indexed according to the sampling plan Reference: TSP68-10541 
lambda value arranged in descending order, the sam- Patent status: 
pie size,	 and the number of failures permitted No patent action is contemplated by NASA. 
(acceptance number). Source: C. R. Toye 
The temperature range of the tables is from 200° Electronics Research Center 
to 25°C in decrements of 5°. The high temperature (ERC-lO 198) 
of 200°C is perhaps the most common temperature ai Category 02
This document was prepared under the sponsorship of the National	 Government assumes any liability resulting from the use of the 
Aeronautics and Space Administration. Neither the United States	 information contained in this document, or warrants that such use 
Government nor any person acting on behalf of the United States 	 will be free from privately owned rights. 
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Failure rates for accelerated acceptance testing of silicon transistors

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