Fabrication method produces stable and reliable metallic systems for interconnections, contact pads, and bonded leads in silicon planar integrated circuits. The method is based on substrate isolation of the interconnection metal from the contact pad and bonded wire

Lytle, W. J.

Schuster, M. A.

English

NASA Technical Reports Server

September 1967	 Brief 67-10335 
NASA TECH BRIEF I& 
NASA Tech Briefs are issued to summarize specific innovations derived from the U.S. space program, 
to encourage their commercial application. Copies are available to the public at 15 cents each 
from the Clearinghouse for Federal Scientific and Technical Information, Springfield, Virginia 22151. 
Method of Improving Contact Bonds in Silicon Integrated Circuits 
The problem: 
Producing stable and reliable metallic systems for 
interconnections, contact pads, and bonded leads in 
silicon planar integrated circuits. In a conventional 
fabrication, employing interconnection metal of 
vapor-deposited aluminum, •contact pads of vapor-
deposited gold on chromium, and bonded lead wires 
of gold, metal-to-metal contact bonds are formed. The 
intermetallic compounds present in the interfaces 
result in a degradation of bond strength, an increase 
in ohmic contact resistance, and eventually in open 
circuits caused by voids which arise from volumetric 
phase mismatch. 
The solution: 
A method of fabrication based on substrate isola-
tion of the interconnection metal from the contact 
pad and bonded wire. 
How it's done: 
The interconnections are separated from the contact 
pads by a barrier domain of bulk silicon substrate 
material which has been degenerately doped. The 
entire region, which is comprised of the interconnec-
tion metal (vapor-deposited, aluminum), the degener-
ate substrate section, and the contact pad (vapor-
deposited gold on chromium), is bounded by a 
diffused isolation ring. Degradation is avoided as the 
metal compatibility need only be between the respec-
tive land metals and the substrate material, and not 
between all the metals collectively. The relatively 
thick substrate barrier prevents any phase reactions 
between the interconnection and pad-wire compo-
nents of the metal assemblage. The preparation of 
this specific interconnection-contact-bonding aggrega-
tion involves techniques that are essentially standard 
to integrated circuit processing: planar diffusion, 
vapor deposition, and photoengraving. 
Notes: 
I. This approach may be applied not only to silicon 
integrated circuits but also to circuits fabricated 
from the more exotic semiconductor materials and 
to hybrid and thin-film circuits. 
2. Inquiries concerning this innovation may be di-
rected to:
Technology Utilization Officer 
Marshall Space Flight Center 
Huntsville, Alabama 35812 
Reference: B67-10335 
Patent status: 
No patent action is contemplated by NASA. 
Source: M. A. Schuster and W. J. Lytle 
of Westinghouse Electric Corporation 
under contract to 
Marshall Space Flight Center 
(MFS-1753) 
Category 01 
This document was prepared under the sponsorship of the National 
Aeronautics and Space Administration. Neither the United States 
Government nor any person acting on behalf of the United States
Government assumes any liability resulting from the use of the 
information contained in this document, or warrants that such use 
will be free from privately owned rights.
https://ntrs.nasa.gov/search.jsp?R=19670000335 2020-03-11T21:05:42+00:00Z



Method of improving contact bonds in silicon integrated circuits

Abstract

Similar works

Full text

Available Versions

NASA Technical Reports Server