Thermal insulation technique permits low and high power electronic chips to operate in the same package without thermal cross-coupling. An alumina glass shield thermally isolates the low power chip from the high power chip while Kovar substrate acts as a heat sink to remove heat from the high power chip

Mc Inturff, R. G.

Mend, W. G.

English

NASA Technical Reports Server

April 1968	 Brief 68-10119 
NASA TECH BRIEF 
NASA Tech Briefs are issued to summarize specific innovations derived from the U.S. space program, 
to encourage their commercial application. Copies are available to the public at 15 cents each 
from the Clearinghouse for Federal Scientific and Technical Information, Springfield, Virginia 22151. 
Multichip Packaging with Thermal Insulation 
Lead
Chip
	 Tab Alumina	 Kovar 
High Power Chip	 Kovar 
The problem: 
In the emerging development of electronic chip 
usage, a significant advance is being made in space 
compression by high concentration of chips within a 
single package. However, thermal cross-coupling has 
been a limiting factor where low and high molecular 
power components have been combined in the same 
package. 
The solution: 
A thermal insulation technique that permits low 
and high molecular power components to operate in 
the same package without thermal cross-coupling.
How it's done: 
The low power chip is mounted on a gold tab 
which is, in turn, mounted to the package on alumina 
glass, as shown in the lower sketch. The high power 
chip is mounted on a Kovar substrate and an alumina 
glass shield is interposed between the two chips. The 
alumina glass shield with a thermal conductivity of 
0.043 tends to thermally isolate the chips while the 
Kovar substrate with a thermal conductivity of 0.193 
acts as a heat sink to remove the heat from the high 
power chip. 
The upper figure depicts a typical multichip 
molecular package with a resistor on one chip and a 
(continued overleaf) 
This document was prepared under the sponsorship of the National 
Aeronautics and Space Administration. Neither the United States 
Government nor any person acting on behalf of the United States
Government assumes any liability resulting from the use of the 
information contained in this document, or warrants that such use 
will be free from privately owned rights.
https://ntrs.nasa.gov/search.jsp?R=19680000119 2020-03-12T05:25:07+00:00Z
high current transistor on the other, with no thermal 
isolation. In tests, a power dissipation change of 250 
mw in the transistor resulted in a 7.7% value change 
in the resistor. The same test, performed with the 
thermally isolated component depicted in the lower 
figure resulted in only a 0.15% value change in the 
resistor. 
Note:' 
Inquiries concerning this innovation may be di-
rected to:
Technology Utilization Officer 
Marshall Space Flight Center 
Huntsville, Alabama 35812 
Reference: B68-10119
Patent status: 
No patent action is contemplated by NASA. 
Source: W. G. Mend and R. G. Mclnturff 
of Westinghouse Electric 
under contract to 
Marshall Space Flight Center 
(M FS- 14076) 
Brief 68-10119	 Category 02


Multichip packaging with thermal insulation

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