Solid-state circuit produces an output pulse with an amplitude directly proportional to the time interval between two input pulses. It uses selected circuit options to achieve variable mode operation and a tunnel diode controls the charging time of a capacitor in proportion to the time interval being measured

Lynch, R. J.

Roddick, R. G.

English

NASA Technical Reports Server

March 1967
	
Brief 67-10053 
O	 AEC—NASA TECH BRIEF 
US
AEC-NASA Tech Briefs describe innovations resulting from the research and development program 
of the U.S. AEC or from AEC-NASA interagency efforts. They are issued to encourage commercial 
application. Tech Briefs are published by NASA and may be purchased, at 15 cents each, from 
the Clearinghouse for Federal Scientific and Technical Information, Springfield, Virginia 22151. 
- 
Solid-State Time-to-Pulse-Height Converter Developed 
Gated	 On 
Start Gate Pulse	 S4  
P	
Clip-	 I
Liii'
I	 Inhibit	 I Or 
Stage
Gate I	 Pulser	 I Ciro iit 
[_
Ji I I 
Ready-	
Start- Gated	 On Start I	 Stop
I Ready	 Si Gate Pulse	 S3
I
2	 Sec 
Pulse
	
Clip-	 I 0
 
I I	 Discharge Delay
Ping	 I Gate rrent	 I 
[Constant
I	 Pulse	 I•u •r-I Amplifier 
Stage
'LJ I	 nerator Generator ____________ 
Gated	 I On I__ I 
Stop Gate Pulse	 j S2 L Bi-	 I 
Pu f 	 ii 0. I	 Stable I I Cirjit I__I	 Charge and I	 Disdiarge Buffer utputWStaciesWo
Output Pulse V 
il-
SL 
The problem: 
To design a circuit capable of producing an output 
pulse with an amplitude directly proportional to the 
time interval between two input pulses. A single circuit 
must be capable of operating under two separate and 
distinctly different input conditions. These conditions 
are:
1. Where it is desired to measure the time interval 
between two pulses which occur in very rapid suc-
cession. This time interval is generally of shorter 
duration than that of the pulse lengths them-
selves. 
2. Where it is desired to measure the time interval 
between the starting point and the end point of a 
continuous "beam" type pulse. The circuit in this 
instance receives not two pulses, but one in the 
form of burst energy. 
This document was prepared under the sponsorship of the Atomic 
Energy Commission and/or the National Aeronautics and Space 
Administration. Neither the United States Government nor any per-
son acting on behalf of the United States Government assumes any
Commonly employed methods of obtaining time-to-
pulse-height conversion require that separate circuits 
be used for each type of input condition. 
The solution: 
A solid-state circuit which incorporates selected cir-
cuit options to achieve variable mode operation. A 
tunnel diode, used as a bistable element, controls the 
charging time of a capacitor in proportion to the time 
interval being measured. Time-to-pulse-height conver-
sion is obtained for either randomly or periodically 
occurring pulses. 
How it's done: 
The device achieves time-to-pulse-height conversion 
by controlling the "on" time of a bistable circuit 
which charges a capacitor. The voltage developed 
across the capacitor is thus proportional to the time 
(continued overleaf( 
liability resulting from the use of the information contained in this 
document, or warrants that the use of any information, apparatus, 
method, or process disclosed in this document may not infringe pri-
vately owned rights. 
https://ntrs.nasa.gov/search.jsp?R=19670000053 2020-03-11T20:22:21+00:00Z
interval. After a short time interval the capacitor is 
discharged so that the circuit is ready for a new 
conversion. The conversion is accomplished by live 
basic circuit functions: (1) wave shaping circuits and 
gates, (2) converter circuits, (3) capacitor discharge 
circuit, (4) start pulse inhibit circuit, and (5) isolating 
and output stages. The circuit permits two modes of 
operation: ready-start and start-stop. 
The ready-start mode is used to measure the time 
interval between two pulses occurring at a random 
rate. By positioning S1 in the ready-start position, the 
circuit turns on the bistable element whenever a start 
pulse appears in coincidence with a ready pulse. The 
ready pulse, whose duration is fixed by a delay cable, 
switches the bistable element off. 
With Si in the start-stop position, a "ready current" 
is always present at the bistable circuit, and the bi-
stable circuit is turned on by a start pulse. The circuit 
remains on until either stop pulse or a "negative" 
ready pulse is applied. This mode of operation is used 
for experiments where one pulse occurs at a periodic 
rate, i.e., pulsed beam experiments. 
The wave shaping circuits and gates first shape the 
input pulses (start, ready, and stop) in size and dura-
tion. The start and stop pulses, which must be positive, 
are clipped to a duration of 7 microseconds. The ready 
pulse is clipped to a time longer than the true interval 
of interest. The start pulse is delayed so that for 
isochronous pulses the start pulse arrives later than the 
start of the ready pulse. 
The capacitor discharge is controlled by the pulse 
generator and the charge and discharge circuitry. A 
normally cut off transistor amplifier is brought into 
conduction and discharges the capacitor after a 2 
microsecond delay. The discharge current of the ca-
pacitor produces an output pulse of an amplitude di-
rectly proportional to the time interval between input 
pulses. 
The "or" and inhibit pulser circuits close the gate 
to the start pulse regardless of the position of S4. This 
is to ensure that a new start pulse will not enter when 
a cycle is in progress. A 2 microsecond delay line is 
included between the discharge pulse generator and
the "or" circuit to provide a flat-topped pulse suitable 
for use with a multichannel pulse height analyzer. 
The isolation and output section uses three cascaded 
emitter followers to present a very high impedance to 
the charging capacitor, thus minimizing capacitor 
leakage current and maintaining system accuracy. 
Notes: 
1. Input pulses to the converter must have a rise time 
of less than 10 nanoseconds and an amplitude of at 
least 1.5 volts. 
2. Ready pulses appearing at the input of the device 
must have a time duration greater than the time lag 
between the pulses under observation. This is to en-
sure that clipping of the ready pulse at the ready 
clipping line will not impair the complete coinci-
dence condition which must occur between ready 
and start pulses. 
3. If desired, all pulse inputs may be gated, thus re-
ducing the duty cycle of the device. A positive 
pulse with an amplitude of 1.5 volts is required to 
open the gate. 
4. Additional details contained in: IEEE Transactions 
on Nuclear Science, June 1964, pp. 399-405. 
5. Inquiries concerning this innovation may be di-
rected to:
Office of Industrial Cooperation 
Argonne National Laboratory 
9700 South Cass Avenue 
Argonne, Illinois 60439 
Reference: B67-10053 
Source: R. G. Roddick, Electronics Division, 
and R. J. Lynch, Physics Division 
(ARG- 170) 
Patent status: 
Inquiries about obtaining rights for commercial use 
of this innovation may be made to: 
Mr. George H. Lee, Chief 
Chicago Patent Group 
U.S. Atomic Energy Commission 
Chicago Operations Office 
9800 South Cass Avenue 
Argonne, Illinois 60439
LI 
. 
Category 01	 Brief 67-10053


Solid-state time-to-pulse-height converter developed

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