Signal acquisition and tracking system covering a wide range of frequencies uses a digital circuit to sample the frequency of an incoming signal and provide correction pulses to the voltage-controlled oscillator. The circuit can also sense the presence of a signal on any one of the input lines

Schaefer, D.

English

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ASO- M 
October-1965	 Brief 65-10307 
NASA TECH BRIEF 
NASA Tech Briefs are issued by the Technology Utilization Division to summarize specific 
technical innovations derived from the space program. Copies are available to the public from 
the Clearinghouse for Federal Scientific and Technical Information, Springfield, Virginia, 22151. 
Frequency Correction Device Uses Digital Circuitry 
Signal B
Clipper 
4 (Sig A) '\ Primary •'-	 d/dt 4 Sample Commands eI	 dIdt __JEJc4iiT 
Binary jI:_1III.___1 a 
F-Fl	 L 	 F- F2 
Binary 2 Reset Signa 
- 1111
Correction Pulse 
Sign Required Indicato r 
1	 0 Secondary
Sample Commands F-F3 
Correction
x
Up Correction 
Pulse Readout Pulses	 Correction 
Time Indicator b Pulses 
Time Intervals a0aa 1
	
2.3,fa0e	 1 Ija2P43P40Pl 
Binary 1 
Binary 2
	 (Signal A) I	 I	 1	 I	 ________ 
11	 I	 I	 I	 I	 I	 I
The problem: To design a circuit that generates 
correction signals to control the frequency of a volt-
age-controlled oscillator in a system used to acquire 
and track incoming signals over a wide range of fre-
quencies. 
The solution: A digital circuit that samples the fre-
quency of the incoming signal at prescribed time inter-
vals and provides correction pulses to the voltage-
controlled oscillator. 
How it's done: The voltage-controlled oscillator 
signal, A, controls a sampling circuit that samples the 
incoming signal, B, once every half cycle of signal A
(primary samples). If the frequencies of the two signals 
are exactly the same, no correction pulses are pro-
duced. If they are not the same, secondary samples 
taken at intermediate time intervals determine whether 
correction pulses should be generated to make signal 
A oscillate at the same frequency as signal B. As indi-
cated in the block diagram, the basic oscillator puts 
out pulses at a frequency four times that of signal A it-
self to facilitate the application of necessary logic. This 
"times four" signal is counted down by the two 
counter stages (binary I and binary 2). The state of 
these binaries as a function of time interval is graphed 
below the block diagram. Primary samples are taken 
.	
(continued overleaf) 
This document was prepared under the sponsorship of the National 
Aeronautics and Space Administration. Neither the United States 
Government nor any person acting on behalf of the United States
Government assumes any liability resulting from the use of the 
information contained in this document, or warrants that such use 
will be free from privately owned rights. 
https://ntrs.nasa.gov/search.jsp?R=19650000305 2020-03-11T17:20:13+00:00Z
and remembered by the flip-flops during time inter-
vals 0 and 2. During time intervals I and 3 one of 
the two flip-flops is being reset. If the frequencies 
of signals A and B are the same, both flip-flops (F-F) 
I and 2 will either be positive or negative during time 
intervals 0 and 2, and there will be no output from 
the exclusive or circuit a. In the absence of an out-
put from this circuit, there will be no "up" or "down" 
correction pulses. When flip-flops I and 2 have op-
posite outputs, correction pulses are needed, and 
there is an output from circuit a. A half cycle prior 
to this instant, flip-flop 3 samples the signal, and 
exclusive or circuit b determines whether an "up" 
or "down" correction pulse is needed. The inputs to 
b are the samples taken at the beginning of time inter-
val 0 and remembered on flip-flop I as well as the 
samples taken either at the beginning of time interval 
I or 3 and remembered on flip-flop 3. If this compari-
son is made during time interval 0, the secondary 
sample obtained at the beginning of time interval 3 is 
used. If the comparison occurs during time interval 2, 
the secondary sample at the beginning of time interval 
I is used. When the two samples are the same, the 
"down" correction pulse and gate has an input. When 
the two samples are different, the "up" correction 
pulse and gate has an input. The "correction pulse 
readout time indicator" line has an output only during
time intervals 0 and 2, so that correction pulses can 
appear only in these intervals. The correction pulses 
are sent to an integrator which controls the oscillator. 
Notes: 
I. When noise is present on the input signal the "up" 
and "down" correction pulses must be processed 
by additional circuitry which allows an output only 
when a certain minimum number of sequential 
"up" or "down" correction pulses are counted. 
With this addition, the system will operate effec-
tively when the noise voltage is twice that of the 
true signal voltage. 
2. The circuit may also be used as a sensing device to 
indicate whether a signal is present on one of sev-
eral input lines. 
3. Inquiries concerning this invention may be directed 
to:
Technology Utilization Officer 
Goddard Space Flight Center 
Greenbelt, Maryland, 20771 
Reference: B65-10307 
Patent status: NASA encourages the immediate 
commercial use of this invention. Inquiries about ob-
taining rights for its commercial use may be made to 
NASA, Code AGP, Washington, D.C., 20546. 
Source: David Schaefer 
(GSFC-268) 
Brief 65-10307	 Category 01


Frequency correction device uses digital circuitry

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