We describe important considerations to create top-down fabricated planar
quantum dots in silicon, often not discussed in detail in literature. The
subtle interplay between intrinsic material properties, interfaces and
fabrication processes plays a crucial role in the formation of
electrostatically defined quantum dots. Processes such as oxidation, physical
vapor deposition and atomic-layer deposition must be tailored in order to
prevent unwanted side effects such as defects, disorder and dewetting. In two
directly related manuscripts written in parallel we use techniques described in
this work to create depletion-mode quantum dots in intrinsic silicon, and
low-disorder silicon quantum dots defined with palladium gates. While we
discuss three different planar gate structures, the general principles also
apply to 0D and 1D systems, such as self-assembled islands and nanowires.Comment: Accepted for publication in Nanotechnology. 31 pages, 12 figure
