A programmable time event coded circuit block for reconfigurable neuromorphic computing

Abstract

A generic programmable time event coded circuit which forms the building block for a reconfigurable neuromorphic array is implemented in analog VLSI.An array of programmable time event coded circuit blocks is configured to implement functional circuit blocks of a spike time based neuromorphic model. A reconfigurable neuromorphic array chip with 10 event blocks is fabricated using Austria Microsystems 0.35 μm CMOS technology to demonstrate the functionality of the circuits in silicon