Development of gallium arsenide laser diode with silicon phototransistor for optical isolation switc

Bonin, E. L.

Harp, E. E.

English

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Report No. 03-68-14 
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~ ff 653 July 65 
for 
PHOTON-COUPLED ISOLATION SWITCH 
i .  
i 
Seventh Quarterly Report 
(1 July to 30 September 1967) 
Contract No. 951340 
Prepared by 
E .  L. Bonin 
and 
E .  E .  Harp 
of 
Texas Instruments Incorporated 
Post Office Box 5012 
Dallas, Texas 75222 
for 
Jet Propulsion Laboratory 
California Institute of Technology 
4800 Oak Grove Drive 
Pasadena, California 91103 
https://ntrs.nasa.gov/search.jsp?R=19680009926 2020-03-12T08:49:31+00:00Z
THIS WORK WAS PERFORMED FOR THE JET PROPULSION LABORATORY, CALIFORNIA 
INSTITUTE OF TECHNOLOGY, SPONSORED BY THE NATIONAL AERONAUTICS AND SPACE 
ADMINISTRATION UNDER CONTRACT NAS7-100. 
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NATIONAL AERONAUTICS AND SPACE ADMINISTRATION 
OFFICE OF SCIENTIFIC AND TECHNICAL INFORMATION 
WASHINGTON 35, D. C .  
ATTENTION : AFSS-A 
~~ 
Report No. 03-68-14 
Seventh Quarterly Report 
for 
PHOTOW-COUPLED ISOLATIOW SWITCH 
(1 July to 30 September 1967) 
Contract No. 951340 
Prepared by 
E .  L. Bonin 
and 
E .  E .  Harp 
of 
Texas Instruments Incorporated 
Post Office Box 5012 
Dallas, Texas 75222 
for 
Jet Propulsion Laboratory 
California Institute of Technology 
4800 Oak Grove Drive 
Pasadena, California 91103 
Report No. 03-68-14 
ABSTRACT 
a 
The photon-coupled isolation switch is a new type of semiconductor device which 
uses internal optical coupling to obtain electrical isolation between the driving source 
and the output terminals. Internal photon generation and detection techniques are used 
which combine a gallium arsenide (GaAs) photon-emitting diode with a silicon (Si) 
phototransistor. A third semiconductor wafer in the isolation switch is a monolithic 
Si driver circuit for supplying bias to the GaAs diode. The driver circuit uses DTL 
circuitry to provide for up to ten inputs, 
This development program consists of two phases: 
Phase I, development of the GaAs photon-emitting diode-Si phototransistor 
pair (GaAs switch) and the design of the driver circuit. 
Phase 11, integration of the driver circuit and prototype production of the 
complete isolation switch. 
Previously Phase I was completed with development of the GaAs switch and 
completion of the design evaluation of the driver circuit. Twenty GaAs switches and 
a breadboard of the driver circuit were delivered for evaluation. Under Phase II a 
layout of components for the driver circuit was made, and diffusion and metallization 
masks were designed. 
During the last  quarter of the program the masks were  fabricated, and processing 
of the integrated driver circuit was begun. Initially, marginal driver-circuit wafers 
were  used in fabricating sample complete isolation switches. Preliminary measure- 
ments indicate that recent driver-circuit wafers  meet the design criteria. 
iii  
Report No . 03-68-14 
TABLE OF CONTENTS 
SECTION TITLE 
I . INTRODUCTION . . . . . . . .  
11 . TECHNICALDISCUSSION . . . . .  
A . Driver Circuit . . . . . . .  
1 . Processing . . . . . .  
2 . Device Results . . . . .  
B . Isolation-Switch Assembly . . .  
111 . CONCLUSIONS AND RECOMMENDATIONS 
N . REFERENCES . . . . . . . .  
. . . . . .  
. . . . . .  
. . . . . .  
. . . . . .  
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PAGE 
1 
3 
3 
3 
5 
6 
13 
15 
b 
iv 
FIGURE 
1. 
2 .  
3 .  
4. 
5. 
6. 
7. 
Report No. 03-68-14 
LIST OF ILLUSTRATIONS 
TITLE 
Major Processing Steps for Driver Circuit . . . . . . 
Driver-Circuit Wafer . . . . . . . . . . . . 
Driver- Circuit Component Layout . . . . . . . . 
Isolation-Switch Schematic . . . . . . . . . . . 
Isolation-Switch Parts . . . . . . . . . . . . 
Internal View of Assembled Isolation Switch 
Major Assembly Steps for Isolation Switch . . . . . . 
. . . . .  
V 
PAGE 
4 
6 
7 
a 
8 
9 
10 
Report No. 03-68-14 
SECTION I 
INTRODUCTION 
Under development is a solid-state device having output terminals which are 
electrically isolated from the driving source and other terminals of the switch. The 
isolation switch embodies internal optical coupling between a solid-state light 
emitteraetector pair to achieve signal transmission without electrical connections. 
Isolation through internal optical coupling has previously been used in develop- 
ment of several other types of devices using the same type of light emitter-detector 
system. These devices include an isolated-input transistor, an isolated-gate PNPN- 
type switch, a multiplex switch not requiring a driving transformer, and an isolated- 
. Each of these devices uses a gallium arsenide (GaAs) 1 ,2 ,3 /  input pulse amplifier 
FN junction diode as the photon generator and a silicon (Si) P N  junction diode as the 
photodetector. This optical pair has been found to produce the most efficient signal 
coupling of the available semiconductor systems. 
The present isolation switch contains three wafers: a monolithic Si driver cir- 
cuit, a GaAs photon-emitting diode, and a Si phototransistor. The driver circuit is 
designed as a DTL gate, providing for up to ten inputs. The output of the driver cir- 
cuit is connected to the photon-emitting diode to control its bias current and thereby 
the photon emission. The GaAs diode is attached to the Si phototransistor with a 
high-refractive-index glass which provides optical transmission and electrical 
isolation. 
1 
Report No. 03-68-14 
This development program is divided into two phases. In Phase I the emitting 
diode-phototransistor pair (GaAs switch) is developed and the driver circuit is de- 
signed, In Phase II of the program the driver circuit is produced, and the three-wafer 
isolation switch is assembled in an integrated-circuit flat package. Phase I was 
completed 4_/ with the delivery of GaAs switches which met the design criteria of this 
subsection of the isolation switch. The design and breadboard analysis of the driver 
circuit were also completed. The design criteria and design equations for the driver 
circuit were described . 5_/ 
Previously, under Phase 11, the integrated-circuit layout was developed for 
components of the driver circuit, and diffusion and metallization masks were designed. 
In the quarter of the program covered by this report, integrated driver circuits were 
made which, to judge from preliminary tests, appear to meet the design criteria. 
Initial marginal driver-circuit monolithic wafers  were used in the fabrication of sample 
complete isolation switches. 
2 
SECTION II 
TECHNICAL DISCUSSION 
A. DRIVER CIRCUIT 
1. Processing 
Seven diffusion masks were designed for processing the integrated driver 
circuit w. Major processing steps are shown in Figure 1. The processing procedure 
is as follows: 
a. 
b. 
C. 
d. 
e. 
Oxidize the slice. Use KMER with mask 1. Perform oxide 
removal and N-type diffusion into the P-type substrate. This 
forms the transistor collectors and resistor isolation tanks. 
Re-oxidize the slice. U s e  KMER with mask 2 .  Perform 
oxide removal and P-type diffusions into the previous 
N-diffusions. This forms the transistor bases and the re- 
sistors.  
Re-oxidize the slice, and use KMER with mask 3. Perform 
oxide removal and N-type diffusion into the P-diffusions of 
the transistors. This forms the transistor emitters. 
Re-oxidize the slice, and use KMER with mask 4. Perform 
oxide removal, revealing the silicon areas which are to be 
metallized. 
Evaporate metal over the slice. U s e  KMER with mask 5, 
leaving only metal within the oxide windows of step d, with 
pads for each for probing. At this point measurements can 
be made of the circuit parameters in slice form. 
3 
Report No. 03-68-14 
RES1 STOR OXIDE 7 T A N K 7  [ COLLECTOR 
SUBSTRATE 
a. D I F F U S E  TRANSISTOR COLLECTORS 
AND RESISTOR TANKS 
f f RES'SToR 
P I 
b. DIFFUSE B A S E S  AND R E S I S T O R S  
c. D I F F U S E  EMITTERS 
~~~ ~ 
d .  APPLY METALLIZATION 
C A 1 5 5 6 9  
Figure 1. Major Processing Steps for Driver Circuit 
4 
8 
Report No. 03-68-14 
f .  Measure the circuit resistors to establish which of two 
resistance ranges has bsen produced within the manu- 
facturing tolerance. Remetallize the slices and apply 
KMER. Use either mask 6 o r  7 as appropriate for form- 
ing the interconnection pattern and selecting the proper 
resistor taps. 
Many evaluations are made during processing. One important test is 
concerned with the forward current gains of the transistors. After step c a portion 
of a slice is taken from the lot, and all oxide is removed. Transistor current gains 
are measured by probing directly to the diffused regions. As indicated in step f, 
measurements of the resistors are needed to set the values within the range used in 
the worst-case analysis -. The values of most corresponding resistors in an entire 
diffusion run fall  within a narrow range. A wider production tolerance is obtained 
when a significant number of runs is involved. Establishing the particular resistivity 
range for a given lot allows the choice between two metallization patterns. This 
determines the taps employed and the resistor limits for the lot. 
S/ 
2. Device Results 
A completed driver-circuit wafer  is shown in Figure 2. Individual com- 
ponents on the wafer  can be identified with reference to the composite drawing of the 
diffusion masks in Figure 3 and the circuit schematic in Figure 4. A detailed dis- 
cussion of the layout was previously presented -. 5/ 
For the first lot of driver circuits the resistor values were in the proper 
range, but transistor collection-emitter breakdown voltages were low. Processing of 
these devices was continued through fabrication of sample complete isolation switches. 
For the second lot of circuits, preliminary tests indicate that the parameters are 
within design limits. Fabrications and additional tests are in process. 
5 
Report No. 03-68-14 
Figure 2 .  Driver-Circuit Wafer 
Individual driver circuits a re  probed on the slice for overall evaluation. 
A circuit terminal characteristic in the on-condition, the voltage between the supply 
voltage terminal and the emitter of Q is  measured for values of current of 23 mA 
and 40 mA. These values correspond to the worst-case limits of GaAs photon-emitting 
diode current for the minimum and maximum values of supply voltage. The yield of 
driver-circuit wafers from the recent lot appears to be good. 
2 ’  
B. ISOLATION-SWITCH ASSEMBLY 
Parts assembled to form the complete isolation switch, shown in Figure 5,  
include the driver circuit, phototransistor, light-emitting diode wafers, two 
ceramic mounts, and a 14-lead TO-84 integrated-circuit header. 
shown include the high refractive index glass which bonds the phototransistor and 
GaAs diode, bonding leads, and solder preforms. An assembled isolation switch is 
Other parts not 
6 
Report No. 03-68-14 
3 n 
D m 
0 
b 
0 
W 
5: 
0 
P 
0 m 
0 
N 
0 
I I 1  I 
II I I  I 
nl 
I 
I 
I
n -** 8 I 
U 
I 
0 0 0 0 - 5: q m N 0 0 19 
7 
Report No. 03-68-14 
I 
1 
1 %JJuR2 Q .  
0 
i I 
I 
I 
I I 
I 
! I 
I I 
I 
R 3  
SCO989 5 
Figure 4.  Isolation-Switch Schematic 
Figure 5. Isolation-Switch Parts 
8 
Report No. 03-68-14 
d o w n  in Figure 6. The driver circuit w a s  from the first  run described in the previous 
section. The major assembly steps of the isolation switch a re  seen in Figure 7 .  The 
assembly procedure is as follows: 
a .  
b. 
C.  
d. 
e.  
f .  
Solder the phototransistor and driver-circuit wafers to the ceramic 
submounts . 
Solder the two metallized ceramic submounts into the header. The 
positions of the ceramics correspond to the location of the photo- 
transistor and driver-circuit wafers in Figure 6.  
Sond leads between appropriate pads m the phototransistor mc! 
driver-circuit wafers and the header pads. 
Bond leads to the unmounted emitting diode wafer. 
Mount the emitting diode to the sensitive region of the phototransistor 
with the hi gh-refractiveindex glass . 
Bond the appropriate leads of the emitting diode to the header and 
driver circuit. 
I” 
Figure 6. Internal View of Assembled Isolation Switch 
9 
Report No. 03-68-14 
D R I V E R  C I R C U I T  
PHOTOTRANS ISTOR 
C E R A M  I C s  
a .  M O U N T  Si W A F E R S  ON C E R A M I C S  
~~ 
b. M O U N T  C E R A M I C S  I N  HEADER AND BOND L E A D S  
IGBAS 
~ 
c. M O U N T  G a A s  D I O D E  AND BOND L E A D S  
CA 1 5573 
Figure 7.  Major  Assembly Steps for Isolation Switch 
g. 
h. Hermetically can the package. 
Cover the periphery of the emitting diode with epoxy. 
The thickness of the ceramic submount for the phototransistor was  made less 
0 
than that for  the driver circuit to allow butting of the ceramics without shorting of 
the metallizations. This provides sufficient clearance for the bonding w i r e s  which 
pass near o r  over the phototransistor wafer. Positioning of the parts in one end 
of the header, as shown in Figure 6, minimizes the lead lengths for bonds in this 
pa r t  of the header. 
10 
Report No. 03-68-14 
Bonding in the isolation switch is considered a monometallic system. Al- 
though aluminum and gold are presently used for metallization on the phototransistor 
and driver circuit, respectively, the corresponding type of bonding lead is used to 
each wafer. Actually all bonding leads a re  gold except for one aluminum lead 
required for the phototransistor emitter contact. Aluminum metallization is now 
used for the phototransistor because it requires a less complex technique of metal 
application for low surface leakage. 
11 
Report No. 03-68-14 
SECTION 111 
CONCLUSIONS AND RECOMMENDATIONS 
Diffusion and metallization masks for integration of the driver circuit have been 
received, and processing has begun. Preliminary tests indicate that the last run of 
monolithic driver-circuit wafers meets the design criteria. Additional testing and 
isolation-switch fabrication are in process. 
13 
Report No. 03-68-14 
PRECEDlNC PAGE BLANK NOT FILMED. 
SECTION IV 
REFERENCES 
1. J. R . Biard and W. T. Matzen, "Advanced Functional Electronic Block Develop- 
ment, "Texas Instruments Incorporated, Contract No. AF 33(657)-9824, 
Report No. RTD-TDR-63-4203, January 1964. 
J. R . Biard et al., "Optoelectronics as Applied to Functional Electronic Blocks, 
IEEE Proceedings,V 52, No. 12,  pp. 1529-1536, December 1964. 
"Integrated Electronic Gating System for Multiplexing Applications 'I ,  IBM, 
J P L  Contract No. 950492, 15 December, 1964. 
E. L. Bonin, "Photon Coupled Isolation Switch, "Texas Instruments Incorporated, 
JPL  Contract No. 951340, Fifth Quarterly Report, 1 January to 31 March, 1967. 
E. L. Bonin and E.  E. Harp, "Photon Coupled Isolation Switch", Texas 
Instruments Incorporated, JPL Contract No. 951340, Sixth Quarterly Report, 
1 April to 30 June, 1967. 
2. 
3. 
4. 
5. 
15 


Photon-coupled isolation switch Quarterly report, 1 Jul. - 30 Sep. 1967

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