Jain, Kiran

Laxmikumar, S T

Singh, P K

IACS Institutional Repository

Induml Phys. 78A (2). 261-264 (2004) Nanomaterials-2003UP >Investigation on porous silicon/CdTe systemKiran Jain*, P K Singh and $  T LaxmikumarElectronic Materials Division. Natidlial Physical Laboratory.Dr K. S Knshnan Marg, Hill Side Roa|, New Delhi-110 012. IndiaE-mail • rooi(oVsnpljren me inAbstract ‘ CdTe layer was cleciro-chemically deposited over porous silicon layer formed by standard anodization pioecss The PL spectrum ihows no change in peak position {630 iim) or the line shape (FWHM = 140 iirn) but the intensity is incieascd by a lacioi of two FFIR studies of the poious silicon surface befoie and after CdTe deposition shows that the Si-H bonds formed during anodization aie replaced to a large extent by S () and Si OH bridges. Pore filling by CdTe revealed no major changes in the 1-V and C-V chaiactenstics except a small decrease in baiiicr cataciiaiiccKeywords ■ Porous silicon, CdTe clectrodeposition, LV measurement. C-V measuicmeniPALS Nos. « l  07  -b , 7 8 .5 !) M b1. IntnKluctionSince the discovery o f  efficien t room temperature visible  photoluminescence o f  poroUvS silicon by Canharn [1 |, porous silicon has attracted a lot o f  attention for optoelectronic, electronic and sensor applications. Porous silicon (PS) can thus be viewed as a new material (^ f interest for future microelectronic applications. Made from the anodic dissolution o f  Si in HF electrolyte, the important feature is that the material with more than 50% porosity remains a single crystal. Recent emphasis has been on the utilization o f  the large surface area offered by porous material. Extensive efforts have been made to incorporate other materials into the nanopores o f  porous s ilicon  for labncation o f nanocom posite materials [2 ]  and sensors 13]. lilectrodeposition is known to covers the inner surfaces o f  porous materials and the pores can be com p letely  filled. Embedded in a high resistivity S i-skeleton, semiconducting  nanowires/nanotubes can be formed [4].Deposition o f various metals e.g. Al, Au, In, Ni, Cu etc .  were investigated for making ohm ic contacts and diode structure labncation [5,6]. It is assumed that wet chem ical processes like eleclrodeposition introduce dam age to the porous silicon  J^urface, a lthou gh  p ore f i l l in g  is very  e f f e c t iv e ,  Cu clectrodeposition is reported to quench both PL and EL [7]. Several studies on semiconductor incorporation into the pores 'vere made. Montes e t  a t  [8 ] have shown that CdTe can be ^Icposited over porous silicon using acidic electrolyte, however ^ tirrespondtng Authorthe photoliim inescencc was quenched after deposition and sample drying. In the present investigation the porous silicon / CdTe structure prepared by eicctrodeposiling CdTe over porous silicon were further investigated by photolum inescence and FFIR. /-Vcharactcri.stics and capacitance voltage measurements on Au/PS/Si structure and Au/CdTe/PS/Si structure were obtained and compared. Results obtained from /-V  curves sh ow ed  n on lin ear b eh av ior in both c a se s . T he C - V  characteristics in both cases are similar to that o f metal-insulator- sem iconductor structure and are m od elled  accord in gly , assuming that air gaps existing in porous silicon are filled by CdTe monocrystals in CdTe/PS sample.2. ExperimentalMechanically polished boron doped ( l(X)) oriented p-type silicon wafers were used for preparing porous silicon. Aluminium was vacuum evaporated and annealed at 6 8 (>T^  for 1 0  min m flowing argon, to form good ohmte contact on the back side. Anodization was carried out at a current density o f  80 mA cm \  for 5 min, m an electrolyte, consisting o f  a 2  : 1 m ix tu reo fIlF an d H ,0 ,. After the anodization, the film s were washed in ethanol and finally in deionized water and dried in air. The porosity o f  the PS layer so obtained was about 70%. To fill the pores, CdTe films were electro-deposited over porous silicon substrates using the acidic aqueous solution. Com position o f  the electrolytic bath was 2.5 MCd^^ 120 ppm (HTeO^) *f pH = 1.6. Standard calomel electrode was used as reference and deposition was carried out at -0 .5 8  V for 30 min. The solution was stirred and kept at a temperature o f© 20041ACS262 Kiran Jain, P K Singh and S T Laxmikumar80*^ C during deposition. CdTe electrodeposition conditions were optimized through initial cyclic voltammetry studies on Si and SnO^ coated glass substrates. At the optimum deposition  potential conditions CdTe layer was deposited on porous silicon substrate.After CdTe deposition the sam ples were washed with d eion ized  water, then with ethanol and left to dry. PL measurements were recorded using a system consisting a two stage monochromator, a PMT with lock in amplifier tor PL detection and an Ar ion laser operating at 488 nm for excitation. All measurements were caiTied out with a laser pc^wer o f 10 mW. The Fourier transform infrared (FTIR) absorption spectra on the PS layer and the PS/CdTc structure were recorded by a spectrometer in the range 4 0 0 4 0 0 0  nm. The current voltage characteristics were measured with the help of a pico-ammcler and constant voltage source and the C - V  measurements with an impedance bridge at J M Hz.3* ResultsJ. 7. F h o lo h u n in e sc e n c e  :PS is con sid ered  as a m aterial w hich  c o n s is ts  o f  Si nancKTystallites and has a larger band gap (1.9 -2 eV) than c-Si due to the quantum confinem ent effect. This is som etim es referred to as quantum confined Si (Qc*Si). The surface o f as formed porous silicon is covered with Si-H (1-3) and Si-O-H  bonds. Generally, the photoluminescence is attributed to the direct gap nature o f  quantum confined Si nano crystallites. However, formation o f a thin a -S i: O : H layer with a band gap of 2.5 eV is also claimed to be responsible.Figure 1 shows the PL spectrum o f a porous sample before and after CdTe deposition. A broad photoluminescence peak centered around 630 nm was observed in porous silic(m sample. The large FWHM o f 120 nm may be associated with the inhomogeneous distribution o f the nanopores or wires and the com plex nature o f surface states present at the large internal surface o f the PS.90 0080 0070 00 W5  60 ,00g  50.00 <f: 40 00 g  3000• PSi ■ CdTe20 00 10,00Li^ J ______ L550 600 650 700 750 800WAVELENGTH (nm)Figure 1, Photolumincsccncc for porous .silicon layer as formed and pore filled by CdTe.After depositing CdTe on the porous silicon sample the photoluminescence intensity was increased by a factor of t^ vo However no appreciable spectral shift is observed. Increased intensity was previously observed by depositing CdS/Zns layers over PS and is explained as due to reduction in the non- radiative recom bination centers, due to the formation ni interface between PS and nanoparticles o f  CdS/ZnS |9 |. In ih^  present case the nanopores o f  PS have been filled by C'div instead o f CdS/ZnS. S ince an electrodeposition in aquaius solution was used to deposit CdTe, similar explanation may he assumed for PL intensity enhancement Le. OH species may he helping in  forming new interface states w'hich act as radiative recombination centres.The present results are in contrast to the results by Momcv et a l  18J, who showed a decreased phololum inescence in C'd tv layer after drying. H ow ever their results on electroless Cd'lc showed no such PL quenching even after air drying and was attributed to PwS oxidation v ia  the corrosion mechanism, which passivates the surface. Form ation o f  ox id e layers diiimt: chemical and electrochemical deposition o f metals has al.s(^  been observed by others | 6 ]. In the present investigations CdTe was deposited over PvS sam ples in an aqueous medium, and weie stored in air for a long duration before measurement. T h is  ma) also contribute to passivation.J. 2. FTIR m e a s u r e m e n t s :FTIR spectra o f  the as prepared PS layer and after CdTe poic filling are shown in Figure 2. Deposition o f  CdTe in the poics caused a major change in I“n iR  pattern. The IR absc^rption pcak^  around 20(X) cm*’ have com pletely disappeared in C d l'c  coated sample. The doublet at 2 1 1 5 -2 0 9 0  cm'* has been idcndfied as s ilic o n  m o n o h y d r id e  and s i l ic o n  d ih y d rid e  streUlu^ respectively. A sharp absorption near 910 cm'* and a strong absorption in 630 -6 8 0  cm * range are reported to be due to Si-I species. The peak at 623.49 cm ' is due to Si-H bending in Si SiH. In case o f CdTe deposited PS sample intensity o f all hydride* related peaks are absent or intensity is suppressed. Absence otFigure 2. FTIR measurements for porous silicon layer as formed {•) pores filled by CdTe (*).Investigation on porous silicon/CdTe system 263hydrogen related peaks means Si-H bonds have been replaced by other bonds in CdTe impregnated sample. Oxygen related stretching modes (SiO in O-SiO and C>SiO) are found in  the 1 0 5 6 ' - 1 1 6 0  cm‘ ‘ range. A broad peak observed around 1097 cm ' in unfilled PS sample is still present after CdTe coating but a slight shift towards higher wavelength side is observed  (1094.56 cm*^ ') and intensity is enhanced. Presence o f oxygen  iclaied stretching modes even in as deposited sample is due to the oxygen adsorption. This peak is more intense in the CdTe filled sample. CdTe electrodeposition was performed in aqueous media and as discussed above, intensity o f the Si-H lines has decreased. Other peaks due to Si-O bonds at 6 6 8  and 630 cm ‘‘ have overlapped in PS sample with bulk Si-Si stretch mode at bl6cm “'. Thus a peak at 623 cm ‘ is observed in PS sam ple.? J. I- V a n d  C- V m e a s u r e m e n t s :/ I'' characteristic o f  the PS is shown in Figure 3(a). The heterostructure shows rectifying behavior. The forward current IS several orders o f magnitude higher than the reverse current. The rectification ratio at 1 V is about 200 for PS at room temperature. The reverse current does not appear to be saturating but shows voltage dependence, indicating carrier transport ihiough the hetero-structure. The log v.y l/V  curve(f'owler-Nordheim plot) curve is shown in Figure 3 (b), this curve clearly shows two different slopes, one in the region 0 to 0.5 V and (he other at higher voltage. The slope in 1st region is 2.8 which changes to 4.2 in the second region. In case o f CdTe impregnated .sample, a similar non linear I -V  relationship is observed. The rectification ratio is however 100 at IV and the slope changes at a voltage o f 0.2. V. The slope in the lower voltage region is higher (about 3.6) and changes to 2,4 m the higher voltage region. The C-V plots were obtained for both ihe samples. Thc.se are shown in Figure 4. No hysteresis was observed in either case.Figure 3. (a) I V and (h) VV curve for Au/PS/Si ( - )  and Au/OdTc/PS/Si (- . .).The /-V  plots are similar to earlier reported results on PS 'samples [ 10,11 ]. The power law behavior with a high exponential factor indicates space charge limited current in the presence o f ^^ aps. It is surprising that similar results are obtained even after CdTe deposition. Normally electrodeposited CdTe is highly insulating and a change in the conduction process would beexpected. It is possible that the porous silicon surface on which electrodeposited CdTe layer is formed is itself highly insulating. Due to this high insulating surface o f  porous silicon, the Au/PS junction itself behaved as MIS structure. Thus the non linear /-V  behaviour is strongly controlled by the presence o f S i : O : H bond configurations on the porous silicon surface. This is further confirmed by capacitance-voltage measurement shown in Figure 4. C - V  curves for both samples can be explained in l^m s of MIS (rnetal-in.sulator-semiconductor) structure. With t fe  change in vo ltage the sem icond u ctor goes from an a^um ulation to depletion region. The increase m the current in I'W curve and a decrease in (he capacitance in C - V  curve both cin  be explained with the formation of a leaky insulator layei in between the Au and PS. The Si-O and Si-OH bonds formed on tlfe porous silicon surface can be responsible for this behavior. However an increase m the current in l - V  curve and a small dccrea.se in the capacitance in C - V  curve both indicate that C d T e  tilling have dccrea.sed the resistance.4 OOE-07-20 -10 0Voltage (V)10 20Figure 4. C apacitiince v.s vollagt* Aii/P.S/Si ( •) and Au/r<JTc/PS/.Si ( . . . )4. ConclusionCdTe layer was electro-chcmically deposited over porous silicon layer formed by standard anodization process. The PL spectrum shows no change in peak position or the line shape but the intensity is increased by a factor o f  two. FTIR studies o f the porous silicon surface before and after C d ic  deposition shows that the Si-H bonds formed during anodization are replaced to a large extent by S -0  and Si-011 bridges. 1-V studies indicated the formation o f a rectifying junction. Both Au-l\S as well as Au- CdTe-PS junctions behaved as MIS structure.AcknowledgmentWe are thankful to Mr. Devendra Gupta for helping us in FTIR measurements.R eferences[1) L T Canham A/)/)/ P//v.s Lett 57 1046 (1090)[2J Roland Henno Materials Svienre and Lnf*uieermt> B69-70 70 ( 2000)f3J L Boarino. V Baratto, F (icobaldo. Q Amaio, E ( ’omini. A M Rossi, G Faglia, G Lcrondel and G Sberveglicri Mat Sn En^ i> B69-70 210 (2000)264 Kiran Jain, P K Singh and S T Uixntikumai[8] L Montes, F Muller. F Gaspard and R Herino Thin Solid Fihn^  297 35 (1997)(41 P Kluth, Q T Zhao. S Winnerl, S Lenk and S Mantl Microelectrmiv Engineering 64 163 (2002)[5] J L Coles, L T Seals and P T Lillehci J Elertrnrhem. 147 3785 (2000)(61 F A Harraz, T Tsuboi, J Sasano, T Sakka and Y H Ogata J.Klertrorhem Sne 149 C456 (2002)[7] M Jeske. J W Schultze. M Thon.ssen and H Mundcr Thin Solid 1111 L A  Balagurov, D Ci Yarkm and E A Petrova Mm. Sd bigg bw(*)) A Gokama, S V Bhoraskar. N R Pavaskar and S D Sathaye 1%^  Slat Sol (a) 182 175 (2000)[10] D Dim ova-M alinovska and M N ikolaeva Vacuum 69 227 (2003)ninn 255 63 (1995) 127 (2000)

Investigation on Porous Silicon/CdTe System

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Investigation on Porous Silicon/CdTe System

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