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Design optimization of AlInAs GaInAs HEMTs for high-frequency applications

Abstract

Por medio de simulaciones Monte Carlo se ha estudiado el efecto que tienen sobre las características dinamicas de HEMTs de InGaAs con 50nm de longitud de puerta dos parámetros importantes en la fabricación de los transistores: su anchura y el nivel de dopaje de la capa delta. El cálculo de los valores de las frecuencias de corte ft y fmax nos ha permitido concluir que el dopaje delta debe ser lo menor posible para mejorar las prestaciones en alta frecuencia, con el problema que tanbien hace disminuir la potencia entregada. También la anchura de los transistores debe ser la menor posible para obtener valores óptimos de ft y fmax, siempre teneiendo en cuenta que al reducirla el efecto de las capacidades puede hacerse importante.By using a Monte Carlo simulator, the static and dynamic characteristics of 50-nm-gate AlInAs GaInAs -dopedhigh-electron mobility transistors (HEMTs) are investigated. The Monte Carlo model includes some important effects that areindispensable when trying to reproduce the real behavior of the devices, such as degeneracy, presence of surface charges, T-shape of the gate, presence of dielectrics, and contact resistances. Among the large quantity of design parameters that enter the fabricationof the devices, we have studied the influence on their performanceof two important factors: the doping level of the -doped layer, and the width of the devices. We have confirmed that the value of the -doping must be increased to avoid the reduction of the drain current due to the depletion of the channel by the surface potential.However, a higher -doping has the drawback that the frequency performance of the HEMTs is deteriorated, and its value must be carefully chosen depending on the system requirements in termsof delivered power and frequency of operation. The reduction of the device width has been also checked to improve the cutoff frequencies of the HEMTs, with a lower limit imposed by the degradation provoked by the offset extrinsic capacitances

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