Jørgensen, Ivan Harald Holger

Larsen, Dennis Øland

Llimos Muntal, Pere

Yosef-Hay, Yoni

Yoni Yosef-Hay

Dennis Øland Larsen

Pere Llimós Muntal

Ivan H. H. Jørgensen

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Analog Integrated Circuits and Signal Processing

English

Fully integrated, low drop-out linear voltage regulator in 180 nm CMOS

This paper presents a capacitor-free low dropout (LDO) linear regulator based on a dual loop topology. The regulator utilizes two feedback loops to satisfy the challenges of hearing aid devices, which include fast transient performance and small voltage spikes under rapid load-current changes. The proposed design works without the need of a decoupling capacitor connected at the output and operates with a 0-100 pF capacitive load. The design has been taped out in a 0.18 µm CMOS process. The proposed regulator has a low component count, area of 0.012 mm2 and is suitable for system-on-chip integration. It regulates the output voltage at 0.9 V from a 1.0 V - 1.4 V supply. The measured results for a current step load from 250-500 µA with a rise and fall time of 1.5 µs are an overshoot of 26 mV and undershoot of 26 mV with a settling time of 3.5 µs when CL between 0-100 pF. The proposed LDO regulator consumes a quiescent current of only 10.5 µA. The design is suitable for application with a current step edge time of 1 ns while maintaining ∆Vout of 64 mV

Online Research Database In Technology

Fully Integrated, Low Drop-Out Linear Voltage Regulator in 180 nm CMOS - DTU Orbit(09/11/2017) Fully Integrated, Low Drop-Out Linear Voltage Regulator in 180 nm CMOSThis paper presents a capacitor-free low dropout (LDO) linear regulator based on a dual loop topology. The regulatorutilizes two feedback loops to satisfy the challenges of hearing aid devices, which include fast transient performance andsmall voltage spikes under rapid load-current changes. The proposed design works without the need of a decouplingcapacitor connected at the output and operates with a 0-100 pF capacitive load. The design has been taped out in a 0.18µm CMOS process. The proposed regulator has a low component count, area of 0.012 mm2 and is suitable for system-on-chip integration. It regulates the output voltage at 0.9 V from a 1.0 V - 1.4 V supply. The measured results for a currentstep load from 250-500 µA with a rise and fall time of 1.5 µs are an overshoot of 26 mV and undershoot of 26 mV with asettling time of 3.5 µs when CL between 0-100 pF. The proposed LDO regulator consumes a quiescent current of only10.5 µA. The design is suitable for application with a current step edge time of 1 ns while maintaining ∆Vout of 64 mV. General informationState: PublishedOrganisations: Department of Electrical Engineering, Electronics, Technical University of DenmarkAuthors: Yosef-Hay, Y. (Ekstern), Larsen, D. Ø. (Intern), Llimos Muntal, P. (Intern), Jørgensen, I. H. H. (Intern)Number of pages: 10Pages: 427-436Publication date: 2017Main Research Area: Technical/natural sciences Publication informationJournal: Analog Integrated Circuits and Signal ProcessingVolume: 92Issue number: 3ISSN (Print): 0925-1030Ratings: BFI (2017): BFI-level 1 Web of Science (2017): Indexed Yes BFI (2016): BFI-level 1 Scopus rating (2016): CiteScore 0.74 SJR 0.233 SNIP 0.579 Web of Science (2016): Indexed yes BFI (2015): BFI-level 1 Scopus rating (2015): SJR 0.204 SNIP 0.405 CiteScore 0.58 Web of Science (2015): Indexed yes BFI (2014): BFI-level 1 Scopus rating (2014): SJR 0.228 SNIP 0.647 CiteScore 0.64 Web of Science (2014): Indexed yes BFI (2013): BFI-level 1 Scopus rating (2013): SJR 0.262 SNIP 0.632 CiteScore 0.72 ISI indexed (2013): ISI indexed yes Web of Science (2013): Indexed yes BFI (2012): BFI-level 1 Scopus rating (2012): SJR 0.272 SNIP 0.568 CiteScore 0.72 ISI indexed (2012): ISI indexed yes BFI (2011): BFI-level 1 Scopus rating (2011): SJR 0.292 SNIP 0.694 CiteScore 0.95 ISI indexed (2011): ISI indexed yes BFI (2010): BFI-level 1 Scopus rating (2010): SJR 0.223 SNIP 0.609 BFI (2009): BFI-level 1 Scopus rating (2009): SJR 0.279 SNIP 0.585 Web of Science (2009): Indexed yes BFI (2008): BFI-level 1 Scopus rating (2008): SJR 0.308 SNIP 0.623 Scopus rating (2007): SJR 0.245 SNIP 0.642 Web of Science (2007): Indexed yes Scopus rating (2006): SJR 0.252 SNIP 0.483 Web of Science (2006): Indexed yes Scopus rating (2005): SJR 0.21 SNIP 0.574 Web of Science (2005): Indexed yes Scopus rating (2004): SJR 0.251 SNIP 0.806 Web of Science (2004): Indexed yes Scopus rating (2003): SJR 0.325 SNIP 0.632 Web of Science (2003): Indexed yes Scopus rating (2002): SJR 0.322 SNIP 0.668 Web of Science (2002): Indexed yes Scopus rating (2001): SJR 0.393 SNIP 0.662 Scopus rating (2000): SJR 0.271 SNIP 0.586 Scopus rating (1999): SJR 0.452 SNIP 1.081 Original language: EnglishLinear voltage regulators , Low drop-out, Capacitor-free, Capacitor-less , Dual-loop, Fast transient response DOIs: 10.1007/s10470-017-1012-5 Source: PublicationPreSubmissionSource-ID: 133500241Publication: Research - peer-review › Journal article – Annual report year: 2017 

Fully Integrated, Low Drop-Out Linear Voltage Regulator in 180 nm CMOS

http://orbit.dtu.dk/en/publications/fully-integrated-low-dropout-linear-voltage-regulator-in-180-nm-cmos(8747d5aa-a42b-46ef-95c9-6e1f2f99eb99).pdf?nofollow=true&rendering=long

Fully Integrated, Low Drop-Out Linear Voltage Regulator in 180 nm CMOS

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