An array-based design methodology for 10GHz SiGe LC oscillators

Abstract

In this paper, a mask programmable arraybased design methodology is used for the first time to implement a 10 GHz LC oscillator in a SiGe bipolar technology. The array used was not optimised prior to this design for the development of such circuits, and is used to highlight some of the restrictions faced by the designer when adopting an array-based approach. 10 GHz operation is demonstrated with a phase noise of –85.5 dBc/Hz @ 1MHz on first pass silicon. Whilst this performance is inferior to a full custom LC solution, the array-based design exceeds significantly the performance levels obtainable from a ring oscillator implemented using full custom techniques which meets the SONET jitter specifications. Detailed analysis of the various phase noise contributions to the 10 GHz LC oscillator show that the performance is not prohibitively compromised by the array-based design approach. Together with the improved time-to-market resulting from an array-based approach, this work makes a compelling case for the viability and adoption of arraybased design methodologies for a wide range of RF and microwave applications

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