AR2T : implementing a truly SRAM-based FPGA on-line concurrent testing

Abstract

The new partial and dynamic reconfigurable features offered by new generations of SRAM-based FPGAs may be used to improve the dependability of reconfigurable hardware platforms through the implementation of on-line concurrent testing / fault tolerance mechanisms. However, such mechanisms imply the existence of new test strategies that do not interfere with the current system functionality.The AR2T (Active Replication and Release for Testing) technique is a set of procedures that enables the implementation of a truly non-intrusive structural on-line concurrent testing approach, detecting and avoiding permanent faults and correcting errors due to transient faults. Experimental results prove the effectiveness of these solutions. In relation to a previous technique proposed by the authors as part of the DRAFT FPGA concurrent test methodology, AR2T extends the range of circuits that can be replicated, by introducing a small replication aid block