We describe a high-speed physical random number generator based on a hybrid
Boolean network with autonomous and clocked logic gates, realized on a
reconfigurable chip. The autonomous logic gates are arranged in a bidirectional
ring topology and generate broadband chaos. The clocked logic gates receive
input from the autonomous logic gates so that random numbers are generated
physically that pass standard randomness tests without further post-processing.
The large number of logic gates on reconfigurable chips allows for parallel
generation of random numbers, as demonstrated by our implementation of 128
physical random number generators that achieve a real-time bit rate of 12.8
Gbit/s.Comment: 5 pages, 3 figures, accepted in Phys. Rev. E as a Rapid Communicatio