Žilinská univerzita v Žiline. Elektrotechnická fakulta
Abstract
The contribution presents the results of simulation of direct tunnelling of free charge carriers through a thin gate
insulator in MOS structures consisting of a Ta2O5/SiO2 bilayer taking into account also indirect tunnelling of free charge
carriers through the SiO2/Si interface traps. The calculated I–V and C–V curves reveal the processes of electron and hole
tunnelling through the insulator-to-semiconductor potential barrier that can be divided into four classes
