Residue Number System (RNS) is an alternative
form of representing integers on which a large value gets
represented by a set of smaller and independent integers.
Cryptographic and signal filtering algorithms benefit from the
use of RNS, due to its capabilities to increase performance and
security. Herein, a simulation tool is presented which emulates
the hardware implementation of an actual RNS co-processor. An
“high-level to assembly” instructions generator is also built into
this tool. The programmability and scalable architecture of the
considered processor along with the high level description of the
algorithm allows researchers and developers to easily evaluate
and test their RNS algorithms on an actual architecture, using
Java
