Dassinger, F.

Ensinger, W.

Greiner, F.

Hottes, M.

Quednau, S.

Rauber, M.

Sarwar, R.

Schlaak, H. F.

Stegmann, C.

Trautmann, C.

GSI Repository

GSITemplate2007 Integration of nanowires onto 100 mm wafers by the growth in-place method* F. Greiner1, F. Dassinger1, S. Quednau1, R. Sarwar1, M. Hottes1, C. Stegmann1, M. Rauber1,C. Trautmann1,2, H. F. Schlaak1, and W. Ensinger11Technische Universität Darmstadt, Germany; 2GSI, Darmstadt, Germany.The synthesis of submicron wires and nanowires based on ion-track-etched polymer templates and subsequent electrodeposition is an important expertise [1] this work relies on. Our approach [2] describes the growth in-place of metallic micro and nano-wires onto rigid and planar wafers of 100 mm diameter. These wafers are designed to be used for high-resolution UV lithography for batch fab-rication of microstructures. Thereby, the approach paves the way to the integration of free standing submicron wires and nanowires in micro-electro-mechanical systems (MEMS) with manifold opportunities of application. The process starts with the physical vapor deposition (PVD) of a 150 nm thick Ni film followed by microstruc-turing by lithography and wet etching (fig. 1 a). After stripping the photoresist, these circuit paths are gold plated by immersion. Then another photoresist layer is applied onto the wafer surface lithographically in such a way that specific areas remain open for later wire growth (fig. 1 b). In parallel, ion-irradiated polycarbonate mem-branes are etched to produce parallel-oriented cylindrical channels vertically perforating the membranes (fig. 1 c and d) [3]. Subsequently, the track-etched membrane is laminated onto the wafer (fig. 1 e). By applying heat and pressure, the photoresist becomes adhesive and reliably fixes the membrane on the wafer surface. In the following, the channels are filled with a metal by electrodeposition. The control of the process parameters allows us to taylor the shape of the wire array. The wire growth can be stopped before reaching the membrane surface (fig. 1 f). Alternatively, the growth can be contin-ued to obtain a closed top layer on the wire array (fig. 1 g). Another option is to apply PVD, thick film lithogra-phy, and electrodeposition on top of this structure and to grow another metallic microstructure on the upper layer of the wire array (fig. 1 h). By means of plasma etching, all polymer material can finally be removed releasing the wires with clean functional surfaces and without sticking of adjacent wires. Currently, three system configurations with integrated vertical wires are investigated. Gold submicron wires without overgrowth are studied to minimize the electrical resistance of contact systems in MEMS (fig. 1 i). The wires are very flexible and are sup-posed to need minimal forces to build up small resistance micro contacts (a-spots).  Wire arrays made of vertical submicron wires with a closed overgrown top layer are investigated for gas flow analyzing MEMS (fig. 1 j). The large surface-to-volume ratio is expected to accelerate the system response.  A similar configuration applies a larger microstructure on top of the flexible wire array for an acceleration detec-tion MEMS (fig. 1 k).  Figure 1: (a-h): Process flow of micro- and nano-wire integration by the growth in-place method; (i-k) Scanning electron and optical microscopy images of MEMS with grown in-place wire arrays.  References [1] S. Karim et al, Appl. Phys. A 84, 403-407 (2006) [2] F Greiner et al, J. Micromech. Microeng. 23 025018 (2013) [3] W Ensinger, P Vater, Mat. Sci. Eng. C 25, 609-619, (2005) * Work supported by BMBF, grant numbers 16SV5053,16SV5475, 16SV5476 and 16SV5511. Corresponding authors: mems@emk.tu-darmstadt.de GSI SCIENTIFIC REPORT 2012 PNI-INHOUSE-EXP-44413

Integration of nanowires onto 100 mm wafers by the growth in-place method

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Integration of nanowires onto 100 mm wafers by the growth in-place method

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