'Institute of Electrical and Electronics Engineers (IEEE)'
Doi
Abstract
We propose a subthreshold CMOS voltage reference operating with a minimum supply voltage of only 150 mV, which is three times lower than the minimum value presently reported in the literature. The generated reference voltage is only 17.69 mV. This result has been achieved by introducing a temperature compensation technique that does not require the drain-source voltage of each MOSFET to be larger than 4kT/q. The implemented solution consists in two transistors voltage reference with two MOSFETs of the same threshold-type and exploits the dependence of the threshold voltage on transistor size. Measurements performed over a large sample population of 60 chips from two separate batches show a standard deviation of only 0.29 mV. The mean variation of the reference voltage for VDD ranging from 0.15 to 1.8 V is 359.5 μV/V, whereas the mean variation of VREF in the temperature range from 0°C to 120°C is 26.74 μV/°C. The mean power consumption at 25 °C for VDD = 0.15 V is 26.1 pW. The occupied area is 1200 μm2
