'Institute of Electrical and Electronics Engineers (IEEE)'
Abstract
International audienceControlling the process parameters becomes more and more difficult with the advancement of technology into the nanometre regime. Traditional corner based Static Timing Analysis (STA) becomes inefficient to handle chip timing performance under process variations owing to the large number of corners.Statistical Static Timing Analysis (SSTA) enables us to perform timing yield estimation under process parameters variation. However, accurate full chip timing yield estimation is attainableonly if the statistical characterization is performed for each constituent cell. In other words, we need to be able to generate statistical standard cells libraries. Our study focuses mainly on 45nm MOSFET mismatch parameters variation (threshold voltage, mobility). An accurate and relatively easy method toachieve this goal consists of using Monte Carlo (MC) simulation for electrical characterization. Unfortunately, the MC simulation time increases drastically with the number of MOS transistors constituting a standard cell. As of today very few papers put the focus on statistical libraries generation aspects. Nevertheless,[13] proposed an approach resulting in as much as 12X runtime improvement with accuracy within 12% on delay distribution compared with MC simulations. In order to reduce runtime performances, we propose a new statistical methodology for linear delay model extraction based on Design of Experiment(DOE) methodology which permits fast standard cell statistical library generation. This new methodology permits to achieve 20X runtime improvement on complex cells and 56X on other commonstandard cells, within 10% accuracy of MC simulations on standard deviation. 35X simulation time improvement is observed to generate a full statistical clock library (79 cells). Consideringthe capability of the approach to generate fast accurate delay distributions, it can be deployed in industries to generate amount of libraries statically which was not possible as of today because of MC simulations time
