This paper presents a BiCMOS technology project of a Current 

Carrier Transceiver (CCT) for data and digital broadcasting on 

Low Voltage (LV) power lines (230-240~Vac).  The CCT is the 

central piece in using the LV power lines network as 

communication channel for various "intelligent" sensors, 

actuators, monitors, and remote control for domotic or industrial 

purpose

D., Ioan

Lazarescu, MIHAI TEODOR

M., Sartori

English

This paper presents a BiCMOS technology project of a Current 
Carrier Transceiver (CCT) for data and digital broadcasting on 
Low Voltage (LV) power lines (230-240~Vac).  The CCT is the 
central piece in using the LV power lines network as 
communication channel for various "intelligent" sensors, 
actuators, monitors, and remote control for domotic or industrial 
purpose

M. Sartori

LAZARESCU, MIHAI TEODOR

D. Ioan

PORTO@iris (Publications Open Repository TOrino - Politecnico di Torino)

04 August 2020POLITECNICO DI TORINORepository ISTITUZIONALEA BiCMOS current carrier transceiver on low voltage power lines / M., Sartori; Lazarescu, MIHAI TEODOR; D., Ioan. -STAMPA. - (1994), pp. 304-309. ((Intervento presentato al convegno Fifth Eurochip workshop tenutosi a Dresden,Germany nel 17-19 Ottobre.OriginalA BiCMOS current carrier transceiver on low voltage power linesPublisher:PublishedDOI:Terms of use:openAccessPublisher copyright(Article begins on next page)This article is made available under terms and conditions as specified in the  corresponding bibliographic description inthe repositoryAvailability:This version is available at: 11583/2591967 since: 2018-09-19T18:21:11ZEurochipEUROCIllV1271217181925313238444950515763TABLE OF CONTENTSForewordOrganisation and AimVLSI DESIGN: FROM TEACHING TO RESEARCHCHAIRPERSON : W SCHWARZ, TECHNISCHE UNIVERSITAT DRESDENTOWARDS TEACHING SYSTEM DESIGN CONCEPTS: ADVANTAGES AND EXPERIENCESJ Bormans, J Cornells, ETRO/IR1S, VUB, BrusselsF van der Schueren, IHAM, AntwerpenIBolsens.VSDM/lMEC.LeuvenTHE SEMICUSTOM DESIGN AND TEST PATH, USED FOR CHIP DESIGN EDUCATION AT DELFT UNIVERSITYR Nouta, E Hendriks, Technische Universiteit Delft5.8Gb/s 16:1 MULTIPLEXER AND 1:16 DEMULTIPLEXER USING 1.2p BICMOSJ Midtgaard, C Svensson, DTU, LyngbyTEACHING ANALOG AND HYBRID DESIGNCHAIRPERSON : M DECLERCQ, ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNEA MIXED INTEGRATED CIRCUIT DESIGN PRACTICAL PROJECTJF Naviner, P Loumeau, H Petit, J Porte, Telecom, ParisTRAINING IN ANALOG/DIGITAL CMOS DESIGNP Nord, BA Molin, Lund UniversityTEACHING MIXED-MODE INTEGRATED CIRCUIT DESIGN USING A CUSTOMIZED ANALOG/DIGITAL TRANSISTOR ARRAY UNDERCADENCE ANALOG ARTISTH Acker, S Schwehr, J Vollrath, Technische Universitat DarmstadtFUNDAMENTALSCHAIRPERSON : R UBAR, TALUNNA TECHNIKAULIKOOLEARLY EXPOSURE TO REAL DESIGN AND IMPLEMENTATION IN A COMPUTER ENGINEERING COURSEJ Garside, M Clarke, University of ManchesterCOMPLEXITY MEASURES FOR VER1LOG-HDL MODELSM Schafers, P Blinzer, J Reitner, Technische Universitat BraunschweigANALYZING LARGE STATEMATE MODELSE Cochlovius, U Golze, Technische Universitat BraunschweigiCURRICULACHAIRPERSON : M RENCZ, BUDAPEST! MOSZAKI EGYETEMVLSI DESIGN TRAINING AT THE TECHNICAL UNIVERSITY OF DRESDENR Schuffny, W Reinhold, Technische Universitat DresdenEDUCATION IN THE AREA OF HIGH-LEVEL DESIGN TECHNIQUES AT TU DARMSTADTU Baake, M Goedecke, SA Huss, M Schaffner, Technische Universitat DarmstadtTEACHING HIGH-SPEED GAASIC-DESIGNP Danielsen, DTU, LyngbyMICROELECTRONICS AND VLSI DESIGN IN NEW CURRICULA AT THE FACULTY OF ELECTRONICS WUTA Plitzner, W Kuzmicz, Politechnika WarszawskaVII69707985919799100103109115116120128133139145146152158164170TEACHING DIGITAL DESIGNCHAIRPERSON : B HOCHET, ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNEAN APPROACH TO VHDL MODELING OF PROCESSORS: APPLICATION TO INTEL 8051C Premont, N Abouchi, R Grisel, ICPI, LyonMULTILAB PROJECTA Amara, M Ciazynski, F Amiel, JF Lepere, 1SEP, ParisEXERCISES ON HIGH LEVEL DESIGN AUTOMATIONP Thole, W Rosenstiel, Universitat TubingenPRACTICAL AND EDUCATIONAL ASPECTS OF ON-UNE ARITHMETICJ Andersen, FT Moller, 0 Olsen, Aalborg UniversitySESSION EUROCHIPCHAIRPERSON : A KAESSER, GMD/EUROCHIPANALOG CIRCUIT DESIGN + MODELINGCHAIRPERSON : A KAISER, INSTITUT SUPERIEUR D'ELECTRONIQUE DU NORD, LILLEA HIGH SPEED, LOW POWER 8-BIT CMOS A/D CONVERTERDJ Foley, JG Ryan, National Microelectronics Research Centre, CorkA VLSI DESIGN PROJECT FOR CROSSTALK MEASUREMENTE Sicard, A liaud, JY Foumiols, JL Noullet, 1NSA, ToulouseA MONOLITHIC SAMPLE & HOLD CIRCUIT FOR HIGH-SPEED DIGITAL WAVEFORM ACQUISITIONGF Avitabile, A Cidronali, GF Manes, Universita di FirenzeVLSI PROCESSOR DESIGNCHAIRPERSON : A FERRARI, UNIVERSIDADE DE AVEIRODESIGN OF A RISC/VUW PROCESSORD Houzet, IRTT-ENSEEIHT, ToulouseA TUTORIAL FOR ADVANCED VLSI COURSE: DESIGNING THE 32 BIT DLX MICROPROCESSOR WITH THE ALLIANCE CAD SYSTEMP Bazargan-Sabet, J Dunoyer, A Greiner, MM Rosset-Louerat, Universite Pierre et Marie Curie, ParisHIGH LEVEL DESIGN OF A RISC MICROCONTROLLERB Weber, R Reither, J Fromwald, P Mandl, G Gridling, D Loy, Technische Universitaet WienA MICROPROCESSOR IN 4 MONTHS: DEVELOPMENT OF THE FHOP - MICROPROCESSOR - KERNEL VIA VHDL AND LOGIC • SYNTHESIST Gieringer, F Zimpfer, D Jansen, Fachhochschule OffenburgVHDL-BASED ARCHITECTURAL DESIGN OF GRECO, A HIGH-PERFORMANCE SCREENING COPROCESSORD Buyse, P Cnudde, R Lasure, J Van Campenhout, Indus t r ie Hogeschool BME, GentTEST AND TESTABILITYCHAIRPERSON : E VALDERRAMA, UNIVERSIDAD AUTONOMA DE BARCELONAFAULT SIMULATION OF VERILOG MODELS ABOVE THE GATE LEVELT Rosenthal, KP Wachsmann, Technische Universitat BraunschweigA PC-BASED CAD SYSTEM FOR TRAINING DIGITAL TESTR Ubar, A Buldas, P Paomets, J Raik, V Tulit.Tallinna Technikaulikool, TallinnaBOUNDARY SCAN CELLS FROM DESIGN TO TEST IN ASICA Dandache, A Nassih, B Lepley, JP Charles, UCM/CLOES, MetzAN EXAMPLE OF BOUNDARY-SCAN IMPLEMENTATION FOR TEACHING BOARD LEVEL TESTINGO Florent, E Rejouan, A Derieux, M Hirech, Universite Pierre et Marie Curie, ParisDEFECT DETECTION BY THE BULK CURRENTG Kemnitz, H Kohler, RG Spallek, Technische Universitat DresdenVIII177 DESIGN METHODOLOGIES AND TOOLS• CHAIRPERSON : 0 MANCK, TECHNISCHE UNIVERSITAT BERLIN178 DESIGN OF A TRANSMISSION FAILURE INDICATOR CHIP IN A UNIVERSITY STUDENT COURSE USING VHDLJ Frickel, C Kuntzsch, U Heinkel, M Selz Universitat Erlangen-Numberg182 TEACHING EXPERIENCES USING REPROGRAMMABLE GATE ARRAYSM Colley, J Standeven University of Essex188 A ROBUST DESIGN ENVIRONMENT FOR VLSI TRAINING WITH A VERY SHORT LEARNING CURVEP Groeneveld, Technische Universiteit Delft194 TEACHING SYSTEM INTEGRATION USING FPGASA Klindworth, K Lagemann, L Larsson, B Schutz, University of Hamburg200 CHDL++: UNDERSTANDING VHDL IMPLEMENTATION CONCEPTS BY USING C++KC Posch, Technische Universitaet Graz207 SPECIAL SESSION: FUTURE DEVELOPMENTS IN STRATEGICAREAS IN MICROELECTRONICS; CHAIRPERSON : W SCHWARZ, TECHNISCHE UNIVERSITAT DRESDEN208 FUTURE DEVELOPMENTS IN SENSORS AND ACTUATORSW. Sansen, KU Leuven218 FUTURE DEVELOPMENTS IN THE TELECOMMUNICATION WORLDJ. Danneels, Alcatel Bell Telephone, Antwerpen225 TECHNOLOGY TRANSFERCHAIRPERSON: A SAUER,«226 IMPLEMENTATION OF A MULTI-FUNCTION SIGNAL DETECTION BLOCK FOR A HELD PROGRAMMABLE ANALOGUE ARRAY USINGMIETEC 2.4)1 CMOS PROCESS AND MENTOR GRAPHICS SOFTWARE VERSION 8.2S Chang, BR Hayes-Gill, C Paull, University of Nottingham232 TRANSFERRING MICROELECTRONIC DESIGN AND TEST SKILLS TO SME THROUGH END-OF-COURSE PROJECTSS Bracho, F Azcondo, M Martinez, Universidad de Cantabria238 MICROSWISS CENTER: A NEW WAY FOR TECHNICAL ENGINEERING SCHOOLS TO COLLABORATE WITH INDUSTRIESJD Chatelain, Centre MICROSWISS de Suisse occidentaleF Corthay, M Jacomet, F Rahali, Ecole d'lngenieurs du Valais243 MICROELECTRONICS IN EUROPEMODERATOR : G DE JONQUIERES, FINANCIAL TIMESPanelists Dr METAKIDES, Director RTD: Information Technologies, Directorate General Industry, ECDr KNORR, Member of Siemens Executive BoardDr SCHOMMER, Minister of Economy of SaxoniaDr CORNU, Vice-President of ALCATEL245 STUDENT DESIGN EXPERIMENTSCHAIRPERSON : F MALOBERTI, UNIVERSITA DI PAVIA246 THE DESIGN OF AN ASIC FOR DRIVING A SWITCHED RELUCTANCE MOTORG Cathebras, LJRMM, MontpellierJ Clare, University Park, Nottingham252 THE URISC EXERCISEM Schafers, KP Wachsmann, G Telkamp, Technische Universitat Braunschweig258 EXPERIENCE ON THE DEVELOPMENT OF A NEUROEMULATOR SYSTEMN Avellana, J Carrabina, L Rabaneda, E Valderrama, Universidad Autonoma de Barcelona264 STUDENT DESIGN EXPERIMENTS-REVISITEDFJ Aas, I Sundsbe, The Norwegian Institute of Technology, TrondheimK271 HIGH-SPEED DIGITAL DESIGNCHAIRPERSON : A DER1EUX, UNIVERSITE PIERRE ET MARIE CURIE, PARIS272 REGISTER-FILE GENERATOR IN GALLIUM ARSENIDEP Royannez, A Amara, ISEP, ParisM Glesner, T Hollstein, G Hoffmann, Technische Universitat Darmstadt278 DESIGN OF A HIGH-SPEED DSP CELL LIBRARYC Hegarty, R Jensen, S Udholm, National Microelectronics Research Centre, Cork284 IMPLEMENTATION OF A BINARY-TO-RNSCONVERTERD Birreck, A Drolshagen, W Anheier, R Laur, Universitat Bremen290 DESIGN AND EXPLOITATION OF A 26,000 GATE MESSAGE ROUTING DEVICEBC O'Neill, GC Coulson, JW Ellis, S Clark, Nottingham Trent University303 ANALOG CIRCUIT DESIGN TRAININGCHAIRPERSON : V PORRA, TEKNILUNEN KORKEAKOULU, HELSINKI304 A BICMOS CURRENT CARRIER TRANSCEIVER ON LOW VOLTAGE POWER LINESM Sartori, Politecnico di TorinoMT Lazarescu, D loan, University "Politehnica" Bucuresti310 TEACHING FULLCUSTOM DESIGN OF ANALOG BUILDING BLOCKS WTTH EUROCH1P FACILITIESV Liberali, F Maloberti, Universita di Pavia316 DESIGNS OF MMIC MICROWAVE AMPLIFIERS BY ENGINEERING STUDENTS AT INPGF Ndagijimana, B Cabon, ENSERG/INPG, Grenoble323 POSTERS324 SYNTHESIS OF A XILING FPGA VECTOR PROCESSOR USING VHDL AND POWERVIEWD Taylor, The University of Huddersfield330 A MICROPROCESSOR UNDERGRADUATE DESIGN PROJECTR Beechinor, B Counihan, S Udholm, National Microelectronics Research Centre, Cork336 MULTI-STAGE SIGMA DELTA ANALOGUE TO DIGITAL CONVERTERSA Keady, P Joyce, C Lyden, J Ryan, National Microelectronics Research Centre, Cork342 A VHDL TUTORIAL FOR PERSONAL COMPUTERSJ Lopez, JC Lopez, ETSI Teiecomunicacion, Madrid346 TEACHING VLSI DESIGN TO ELECTRONIC ENGINEERS AT UNIVERSIDADE DE AVEIROAB Ferrari, VC Alves, DM Santos, Universidade de Aveiro347 AN OPTIMUM SCHEDULE FOR VERY LONG INTEGER OPERATIONS WITH ADDRESSLESS REGISTER SETSA Grogger, R Posch, Technische Universitaet Graz353 LEARNING PIPELINED ARRAYS TRADE-OFFS USING STANDARD CELLS 'E Boemo, J Jauregui, C Santos, F Moreno, J Meneses, ETSI Teiecomunicacion, Madrid359 A REAL TIME SYSTEM FOR ISOLATED SPEECH RECOGNITION BASED ON VTTERBI ALGORITHMJM Fernandez, P Altares, R Peralta, F Moreno, J Meneses, ETSI Telecomunicaciones, Madrid364 ANALOG CELLULAR NEURAL NETWORK DESIGN AS A STUDENT TEAM WORK PROJECTK Halonen, A Paasio, V Porra, Teknillinen Korkeakoulu, Helsinki369 FAST PROTOTYPING AND EMULATION OF ASICS USING FPGASP Kindsmuller, W Puffer, Technische Universitat Munchen375 DEVELOPMENT OF A PROGRAMMABLE DIGITAL CONTROLLER FOR THE IMPLEMENTATION OF A VIRTUAL LABG Donzellini, D Ponta, S Rossi, L Sciutto, M Taini, M Valle, Universita di Genova381 DIGITAL HEART-RATE MONITORA Boilson, MJ Burke, Trinity College Dublin386 HIGH LEVEL MODELING AND SYNTHESIS OF A SIMPLE MICROPROCESSOR WITH TEST STRUCTURESW Daems, M Temmerman, Katholieke Industrie^ Hogeschool Antwerpen392 DECIMATION FILTER FOR SIGMA-DELTA A/D-CONVERTERS Becker, W Reinhold, Technische Universitat Dresden393394400406412416422428429434TEACHING COUPLED LAYOUT, PROCESS AND DEVICE DESIGN OF MODERN SEMICONDUCTOR STRUCTURESR Dittmann, T Graetz, W Klix, JU Schluefiler, RG Spallek, Technische Universitat DresdenVLSI DESIGN IN A THREE YEAR ENGINEERING CURRICULUMJL Navarro, MC Lacruz, C Sanz, Universidad Politecnica de MadridH Chaoui, GN Lu, S Rigo, CEMIP/Universite Paris 6 et 7EXPERIENCE ACCUMULATED BY THE SIMULATION OF AN APPLICATION SPECIFIC ANALOG INTEGRATED CIRCUITGPK Economou, GC Anagnostopoulos, CE Goutis, University of PatrasIJSER-FRIENDLYFPMDEOTWnHANIMPROVTDCm^A Koch, Technische Universitat BraunschweigCONCEPTION OF MICROWAVE MONOLITHIC INTEGRATED MIXERS BASED ON GAAS FET SWITCHES DEVICESE Gosse, EA Allamando, Universite de LilleA NEW VHDL-BASED APPROACH IN MULTILEVEL SIMULATION OF SIGNAL PROCESSING SYSTEMSH Garbe, HI Jentschel, R Kaminski, Technische Universitat DresdenVLSI DESIGN OF AN ADAPTIVE LATTICE FILTER FOR MULTICHANNEL SIGNAL PROCESSINGGO Glentis, MM Samsom, GH Slump, Universiteit Twente, EnschedeIMPACT OF A TEMPUS JEP ON DIGITAL SYSTEMS DESIGN COURSES AT TECHNICAL UNIVERSITY IN ZELONA GORAJ Mirkowski, M Adamski, J Szajna, Politechnika Zielona GoraA CONHGlimLEMASSIVEY PARALLEL NEUROEMULATOR SYSTEMM Alonso, 0 Bernat, R Capillas, A Carreras, J Castillo, E Cordoba, N Cruz, JA Doblado, A Fernandez, P Garcia, R Holgado, 0 Mascort, A Martinez,MA Moruno, M Perez, J Plana, I Romero, J Viveros, N Avellana, Universidad Autonoma de Barcelona435 CAD TOOL DEMONSTRATIONS447 EXHIBITION OF COURSE MATERIAL459 CIRCUITS EXHIBITION463 INDEXXi

A BiCMOS current carrier transceiver on low voltage power lines

This paper presents a BiCMOS technology project of a Current Carrier Transceiver (CCT) for data and digital broadcasting on Low Voltage (LV) power lines (230-240~Vac). The CCT is the central piece in using the LV power lines network as communication channel for various "intelligent" sensors, actuators, monitors, and remote control for domotic or industrial purpos

Sartori, M.

Lazarescu, Mihai Teodor

Ioan, D.

PORTO Publications Open Repository TOrino

https://iris.polito.it/retrieve/handle/11583/2591967/64525/219174431.pdf

A BiCMOS current carrier transceiver on low voltage power lines

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PORTO@iris (Publications Open Repository TOrino - Politecnico di Torino)

PORTO Publications Open Repository TOrino