Vertical leakage mechanism in GaN on Si high electron mobility transistor buffer layers

Abstract

Control of leakage currents in the buffer layers of GaN based transistors on Si substrates is vital for the demonstration of high performance devices. Here, we show that the growth conditions during the metal organic chemical vapour deposition growth of the graded AlGaN strain relief layers (SRLs) can significantly influence the vertical leakage. Using scanning capacitance microscopy, secondary ion mass spectrometry, and transmission electron microscopy, we investigate the origins of leakage paths and show that they result from the preferential incorporation of oxygen impurities on the side wall facets of the inverted hexagonal pyramidal pits which can occur during the growth of the graded AlGaN SRL. We also show that when 2D growth of the AlGaN SRL is maintained a significant increase in the breakdown voltage can be achieved even in much thinner buffer layer structures. These results demonstrate the importance of controlling the morphology of the high electron mobility transistor buffer layer as even at a very low density the leakage paths identified would provide leakage paths in large area devices.This work was funded by the Engineering and Physical Sciences Research Council under Grant Code Nos. EP/K014471/1 and EP/N01202X/1 and the European Research Council under the European Community's Seventh Framework Programme Grant Agreement No. 279361 (MACONS)