'Institute of Electrical and Electronics Engineers (IEEE)'
Doi
Abstract
This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of Brunel University's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to [email protected]. Copyright @ 2005 IEEEA method is presented for finding the optimum fixed inductance-capacitance combination to minimize voltage harmonic distortion at a load bus where it is desired to maintain the displacement power factor at a desired level constraining the compensator values, which would create resonance conditions, and the manufacturers' standard values for power shunt capacitors according to IEEE Standard 18-2002. A comparison study of using the constraint, holding either the displacement power factor or the power factor at a desired value, is done. Finally, the contribution of the newly developed method is demonstrated in six examples taken from existing publications
