OASIcs - OpenAccess Series in Informatics. Annual Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS\u2709)
Doi
Abstract
As transient error rates are growing due to smaller feature sizes,
designing reliable synchronous circuits becomes increasingly
challenging. Asynchronous logic design constitutes a promising
alternative with respect to robustness and stability. In particular,
delay-insensitive asynchronous circuits provide interesting properties,
like an inherent resilience to delay-faults