Bogaerts, Wim

Dumon, P

Fiers, M

Sivilotti, M

English

Ghent University Academic Bibliography

W1E.1.pdf OFC 2016 © OSA 2016The IPKISS photonic design frameworkWim Bogaerts123, Martin Fiers1, Massimo Sivilotti 4, Pieter Dumon1,1Luceda Photonics, Noordlaan 21, 9200 Dendermonde, Belgium.2Ghent University-IMEC, Photonics Research Group, Department of Information Technology, Gent, Belgium.3Center of Nano- and Biophotonics (NB Photonics), Gent, Belgium.4Mentor Graphics, Fremont, CA, USA.wim@lucedaphotonics.comAbstract: We present the IPKISS photonic design framework, which integrates tightly withthe L-Edit layout tool. This close link between connectivity and layout allows automaticwaveguide generation, adjust connectivity in layout, and verify with post-layout simulations.OCIS codes: (250.5300) Photonic integrated circuits; (130.0130) Integrated optics1. IntroductionSilicon photonics is rapidly becoming an industrial technology, and this is rapidly changing the requirements for thedesign of photonic integrated circuits (PIC). It is the first true large-scale integration technology for photonics, withfabrication requirements that require similar design for manufacturability (DfM) as advanced CMOS electronics [1]. Inaddition, PICs require electronic control, which drives photonic design towards electronic design automation (EDA).Photonics and electronics are both based on planar semiconductor processes and can both be treated as circuits.That is why photonic designers are gruadually adopting a design flow similar to that for analog ICs. Starting froma component library a schematic circuit is constructed, which is then used as the basis for the physical layout. Suchschematic driven layout (SDL) can be done manually, but only shows it true potential when supported by designautomation software. Most importantly, at the end of the design process, the layout has to be verified against theoriginal circuit schematic [2].This flow has been well established for analog IC design, but it cannot always be directly applied to photonicsdesign, for the same reason that analog IC design is challenging for advanced CMOS nodes. The key practical obstacleis that in photonics the layout and circuit behavior are very tightly linked, requiring several design iterations to obtainthe desired functionality. Traditionally, these iterations require the designer to take one or two steps back in the flowand manually adjust the schematic design. However, such iterations can become numerous, non-trivial and thereforecostly. This is especially true if every step involves the transfer of design data between different design tools or evendifferent designers. Photonic design will benefit from a flow where the impact of the layout on the circuit design ismore immediate and the integrity of design data exchange is structurally built into the circuit design flow.Fig. 1. Photonic circuit design flows (a) Open-loop SDL flow. Modifications after verification need to restart from the original schematic (b)Closed-loop design flow, where functional and layout design are tightly coupled.W1E.1.pdf OFC 2016 © OSA 2016In photonics, the same can be applied for physical component design. A significant part of photonic design ac-tivities is still focused on geometric optimization of existing and new functional building blocks. Here again, theinteraction between the fabrication layout and the component behavior is very strong. Design data exchange of para-metric cells between different design tools dramatically facilitates the design process of individual components. Giventhat photonic components can have very irregular geometries, it is also important that this data exchange is not limitedto electronic concepts (e.g. Manhattan geometries).In this paper, we discuss recent improvements in IPKISS, a parametric design framework for integrated photonicsthat addresses these concerns [3]. Schematic design and layout are intricately connected, and the integration with EDAdata exchange standards enables tight interaction within an existing EDA environment. We illustrate how we facilitateiterations between layout and circuit on a small example circuit, without having to leave the layout tool.2. The IPKISS FrameworkIPKISS is a design framework for photonic integrated circuits. At the core are powerful definitions of parametric cells(PCell) that integrate all representations of a component or (sub)circuit. Each PCell has multiple views that describe apart of the design (a netlist, mask layout, circuit models, a physical simulation, etc.). The user interacts with each viewby setting parameters and retrieving the resulting data, and views can also interact with one another. For instance, forSDL the layout can automatically extract the connectivity from the netlist to generate waveguides. When a circuit islayed out, the model will be updated with the actual waveguide lengths. IPKISS coordinates this interaction, avoidingduplicate or conflicting information, making design iteration less error prone.The core of IPKISS is a Python scripting engine. Pcells are simple script files, that can be combined into largerlibraries. Python is an industry-standard scripting language with a large ecosystem of scientific and engineering li-braries. Python is also very easy for interaction with third-party design and simulation tools.3. EDA IntegrationIPKISS PCells integrate directly into an EDA design flow through OpenAccess (OA), an industry standard for theexchange of design data between EDA tools, and supported by multiple vendors. Through OA, we have interfacedIPKISS with L-Edit to enable a photonic design flow. L-Edit, a full-custom electronic Layout tool by Mentor Graph-ics (originally by Tanner EDA), supports an SDL flow through integration with schematic editors (e.g. S-Edit) andverification tools (e.g. HiPerVerify or Calibre).Fig. 2. Left: an 8×8 non-blocking crossconnect matrix with multicasting capability. Middle: a reduced 2×2 matrix with the correspondingphotonic-electronic circuit. Note that the topology of this circuit requires at least one crossing. Right: The subcircuit schematic of the 1×2 switch.However, as discussed, back-and-forth transitions between separate schematic and layout design tools can compli-cate a photonic design flow, given the strong impact of layout on circuit behavior. Therefore, the optical connectivitycan be defined directly in L-Edit (or import from another tool). L-Edit’s routing functions can then be used to definethe physical connections, from which IPKISS generates the actual waveguide layouts with bends. Because photoniccircuits are usually implement in a single routing layer, the immediate visual feedback on the circuit topology in thelayout (e.g. unwanted crossings) reduces both the design time and the potential errors. At any time, the layout can besimulated to verify the circuit performance.W1E.1.pdf OFC 2016 © OSA 20164. An exampleWe illustrate this flow while constructing a 2 × 2 optical crossbar switch. When scaled up, this 2×2 switch becomesa full N×N crossconnect matrix [4]. Figure 2 shows the full crossconnect matrix, and the reduced 2×2 circuit. Thecircuit is both electrical and optical, using thermo-optic 1×2 switches with a tunable split ratio to allow multicasting.To design this circuit in a silicon photonics technology, we start from building blocks from a process design kit(PDK). Figure 3 illustrates our design procedure. We can pick, place and parametrize the IPKISS PCells directly in theL-Edit layout tool, and define the connections with flylines. Alternatively, we can import a circuit description (e.g. as aSPICE or VerilogA netlist, or from the OA database) from which the components will be selected and connected auto-matically. For the electrical connections to the Pads, we use L-Edit’s wiring tools. For the waveguides, we let IPKISSdetermine a first routing solution, which takes care of bends and transitions between different types of waveguides.This identifies a waveguide crossing that needs correction. To correct this, we manually insert a crossing componentand reconnect it to the corresponding switches. From this new connectivity, IPKISS generates new waveguides. Atany stage of the construction of the layout we can perform a simulation of the circuit using the Caphe optical circuitsimulator, which allows us to verify whether the corrections (e.g. inserting the crossing) affect the functional behavior.Fig. 3. Constructing the 2×2 crossbar switch of Fig. 2. Left to right: placing and logically connecting the library components; generatingwaveguides and electrical wires; correction of the waveguides by introducing a crossing; Time-domain simulation of the switching behavior.5. ConclusionThe IPKISS design framework enables a tight integration of the circuit and layout design flow of photonic integratedcircuits. The integration with the L-Edit Layout tools facilitates the definition and reiteration of both the connectivityas the physical layout, and allows direct post-layout simulation and verification from the same design environment.References1. W. Bogaerts, M. Fiers, and P. Dumon, “Design challenges in silicon photonics,” J. Sel. Top. Quantum Electron.20, 1–8 (2014).2. R. Cao, J. Billoudet, J. Ferguson, L. Couder, J. Cayo, A. Arriordaz, and I. O’Connor, “LVS check for photonicintegrated circuits: Curvilinear feature extraction and validation,” in “Proceedings of the 2015 Design, Automa-tion & Test in Europe Conference & Exhibition,” (EDA Consortium, San Jose, CA, USA, 2015), DATE ’15, pp.1253–1256.3. M. Fiers, E. Lambert, S. Pathak, P. Dumon, B. Maes, P. Bienstman, and W. Bogaerts, “Improving the designcycle for nanophotonic components,” J. Comp. Sci. 4, 313 – 324 (2013).4. L. Chen and Y. kai Chen, “Compact, low-loss and low-power 8×8 broadband silicon optical switch,” Opt.Express 20, 18,977–18,985 (2012).

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