Rethinking Carrier-based Common-mode Voltage Mitigation and Capacitor Voltage Balancing in Three-level NPC Converters

Abstract

In three-level neutral-point clamped (NPC) converters, carrier-based techniques are widely applied to solve the inherent capacitor voltage balancing problem as well as the common-mode voltage (CMV) mitigation. This article proposes a novel approach to simultaneously address the voltage balancing and CMV issues in a three-phase three-level single-end inverter. It can reduce the dv/dt actions (33%-66%) as well as restricting the CMV magnitude to one-sixth of DC voltage while eliminating the low-frequency voltage oscillation at the dc-ink neutral point. The proposed control method cohesively combines two methods (Method I and Method II) and selects them according to the neutral point (NP) voltage balancing condition. Method I generates four dv/dt actions in a switching cycle with higher voltage balancing ability while Method II only generates two dv/dt actions in a switching cycle with lower voltage balancing ability. Experiments are performed to validate the proposed control method. Additionally, this work observes and investigates the non-ideal phenomenon in practical circuits that causes spikes in the CMV that should have been eliminated from the modulation point of view, which have not been well studied in the literature where explanations and solutions are provided