'Institute of Electrical and Electronics Engineers (IEEE)'
Doi
Abstract
An extensive on-wafer experimental campaign is carried out to determine the thermal resistance dependence on scaling and emitter geometry in state-of-the-art toward-THz silicon–germanium bipolar transistors designed and fabricated within the framework of the European DOTFIVE project. The extraction is performed through a robust procedure, which—differently from classic approaches—exploits an accurately calibrated thermometer relating base-emitter voltage to junction temperature. Experimental data are then used to assess the accuracy of scalable thermal resistance laws for advanced transistor models; it was found that at least four parameters
are needed to ensure a favorable agreement over wide ranges of emitter widths and length
