NetFPGA is a hardware board that it is becoming increasingly popular in various research
areas. It is a hardware customizable router and it can be used to study, implement and test
new protocols and techniques directly in hardware. It allows researchers to experience a
more real experiment environment. In this paper we present a work about the design and
development of four new modules built on top of the NetFPGA Reference Router design. In
particular, they compute the input and output bit rate run time and provide an estimation
of the input bit rate based on an EWMA filter. Moreover we extended the rate limiter
module which is embedded within the output queues in order to test our improved Reference
Router. Along the paper we explain in detail each module as far as the architecture and the
implementation are concerned. Furthermore, we created a testing environment which show
the effectiveness and effciency of our module
