Optimal Carried-Based Pulse Width Modulation of Three-level Dual Output Converter

Abstract

As an advanced power electronic topology, the three-level dual output converter combines three-level technology with dual output characteristics, which has significant advantages in industrial, energy and transportation applications. Achieving capacitor voltage balance and improving dc bus voltage utilization are the key technologies in the application of three-level dual output converter, but it is challenging to satisfy both of them at the same time. In this paper, the optimal carrier-based pulse width modulation (CBPWM) strategies are proposed to address the above problems. By analyzing the effects of three different zero-sequence voltages on the midpoint voltage of the voltage-divider capacitor, two optimized CBPWM strategies based on the injection of different zero-sequence voltages are proposed, which can effectively improve the dc bus voltage utilization. Based on the above different zero-sequence voltages injection strategies, the capacitor voltage balancing method is proposed to control the average midpoint current, which can realize the capacitor voltage balance within different modulation ranges of two sets of outputs. Finally, the effectiveness of the proposed modulation strategy is verified through experiments

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