International audienceThis work address the fault tolerance topic in the GPS context. Starting from a noiseless GPS receiver, redundant mechanisms can be added to design a more resilient GPS receiver in the presence of errors due to process, voltage and temperature (PVT) variations. These mechanisms are based on different layer of abstraction to guarantee a mutual trade-off of system performance (quality of the position given by the GPS receiver), hardware reliability and implementation complexity. An Application-specific integrated circuit (ASIC) will be designed with two versions of the GPS receiver: the standard version, and a complex version where fault tolerant techniques are added to make the GPS receiver more tolerant to errors

Boutillon, Emmanuel

Hafidhi, Mohamed,

National audienceThis paper address the fault tolerance topic in the GPS context. Starting from a noiseless GPS receiver, redundant mechanisms can be added to design a more resilient GPS receiver in the presence of errors due low supply voltage. An Application-specific integrated circuit (ASIC) will be designed, using the 28 nm technology, to compare theoretical results and measured results

Hafidhi, Mohamed, Mourad

HAL-Université de Bretagne Occidentale

Reliable GPS position on an unreliable hardwareMohamed Hafidhi, Emmanuel BoutillonTo cite this version:Mohamed Hafidhi, Emmanuel Boutillon. Reliable GPS position on an unreliable hardware.GDR SOCSIP, Jun 2016, Nantes, France. <https://colloque-socsip.ietr.fr/#page=home>.<hal-01331034>HAL Id: hal-01331034https://hal.archives-ouvertes.fr/hal-01331034Submitted on 13 Jun 2016HAL is a multi-disciplinary open accessarchive for the deposit and dissemination of sci-entific research documents, whether they are pub-lished or not. The documents may come fromteaching and research institutions in France orabroad, or from public or private research centers.L’archive ouverte pluridisciplinaire HAL, estdestine´e au de´poˆt et a` la diffusion de documentsscientifiques de niveau recherche, publie´s ou non,e´manant des e´tablissements d’enseignement et derecherche franc¸ais ou e´trangers, des laboratoirespublics ou prive´s.Reliable GPS position on an unreliable hardwareMohamed Mourad Hafidhi and Emmanuel BoutillonLab-STICC, UMR 6582, Universite´ de Bretagne Sud 56100 Lorient, Franceemail: mohamed.hafidhi@univ-ubs.fr, emmanuel.boutillon@univ-ubs.frI. INTRODUCTIONThere is continual motivation to reduce power consumptionand extend battery life of mobile devices. Power consumptionand device lifetime can be improved by operating at minimalsupply voltage, which increases the likelihood of hardwareerrors. These errors can also be produced due to process andtemperature variations coupled with increased advancement ofCMOS technology [1]. Occurrence of errors can affect theperformance of circuits and can change the state of a gateand the output of a system; their presence can generate asystem failure if it is not corrected. Therefore, it is increasinglyimportant to deal with hardware errors effects in order to keepdevices working properly.Hardware errors can be classified into three main groups:permanent, transient and timing errors. Permanent errors aredefined as an irreversible physical changes: a stuck at thevalue 0 or 1 of a bit. They can be caused by manufacturingdefects or device wear-out. Transient errors are temporal singlemalfunctions that manifest as a temporary change of the binaryvalue of a bit. The other term used for transient errors is SingleEvent Upsets (SEU). Environmental changes, such as higheror lower temperature and voltage variation, are the essentialsources of the occurrence of these errors. Timing errors resultwhen a input signal arrives too late and misses the referencearrival of the clock.During the last decades, reliability of circuits has beenaddressed at the lower design level by proposing resiliencetechniques to protect particular components. Examples are Ra-zor flip-flops to detect signal delay errors [2], double samplingfor combinational circuits [3], error correcting codes used firstto protect memories [4], and then applied for interconnectnetworks [5], and TIMBER techniques for pipeline structures[6]. For higher design level, predictions techniques, such asAlgorithmic Noise Tolerance (ANT) technique, propose toincrease the reliability of circuit by adding a reduced precisionreplica to the original function. This reduced precision replicaconsumes much less power than the original function. Thefinal output is chosen between the original function outputand the output of the replica [7]. In extremely critical ap-plications, such as space, avionics and healthy applications,where the system cost is less important than its reliability,Triple modular redundancy (TMR) is proposed on the systemlevel design [8]. The author of [9] propose some resiliencetechniques for double-iterative Multiple-Input Multiple-OutputBit-Interleaved Coded Modulation (MIMO BICM) receivers.These techniques have been realised on different layers of× ×IncomingSignalCorrelation function moduleIntegrator10 msCodegeneratorCarrierNCOCodeFilterCarrierFilterCodeDiscriminatorCarrierDiscriminatorSatellitescarrierSpreadingcodesNavigationmessage[8][11][9][10]Fig. 1. Top Level of the simplified tracking channel module; Error tolerancehas been already studied in components with warning marks at the output.The corresponding proposed techniques are presented and evaluated in papersbeside each mark.abstraction in order to have a mutual trade-off of system per-formance, hardware reliability and implementation complexity.Global positioning systems (GPS) can be an excellent appli-cation to investigate the trade-off between system performanceand implementation complexity in presence of hardware er-rors. It contains a very interesting set of different signalprocessing problem with different requirements of reliability:Correlation process, tracking loops (recursive operations), FFTprocessing, state machine, Gold and carrier generators.... Theobjective of the this paper1 is to address the fault tolerancetopic in the GPS context. Starting from a noiseless GPSreceiver, redundant mechanisms can be added to design amore resilient GPS receiver in the presence of errors duelow supply voltage. An Application-specific integrated circuit(ASIC) will be designed, using the 28 nm technology, tocompare theoretical results and measured results.II. GPS SIGNAL PROCESSINGA GPS is a well known technology that allows determiningboth the physical position and the absolute time of a receiver.The position in time and in space is determined thanksto a precise distance measurement with at least four GPSsatellites. GPS satellite signals are made of three components:spreading code, navigation message and carrier. For each GPSsatellite visible in view, the GPS receiver tries to extractthe corresponding navigation message. This is accomplishedby comparing a locally generated signals (estimate of thespreading code and the carrier of the tracked satellite) againstthe received signal, then moving in time local signals until it istime aligned with the received signal. A maximum correlation1This work, part of the RELIASIC project, was funded by French gov-ernment sponsors COMIN Labs and the National Research Agency in the“Investing for the Future” program under reference ANR-10-LABX-07-01,and the Brittany Region.output between signals is achieved when they are aligned.Two feedback loops are used to update the local generatedsignals: the carrier tracking loop (to align the local generatedcarrier in frequency ad phase) and the code tracking loop (toalign the local generated code in time). Each loop is made ofdiscriminators and filters. A simplified representation of thechannel tracking module is given in Fig. 1.III. THE PROPOSED TOLERANT SCHEMAAll state of the art techniques have in common that theyrequires hardware cost or/and performance penalties (reducingsystem throughput). System-level technique is identified asthe key to minimize the implementation overhead for errordetection and recovery compared to low-level techniques. Totrack satellites signals, GPS receivers uses feedback loopsto determine over time Doppler offsets. It has been shownin [10]–[12], that the natural design of the tracking loopscan tolerate low rate of hardware errors with a loss of lessthan 1m of error in the position given by the GPS receiver.For moderate and high hardware error rate, we propose acombination of low-level and system level techniques to dealwith hardware errors’ effect. In this paper, we present threemain methods proposed for the robustness of the correlationprocess, discriminators and gold generators.A. Feedback freezing loop (FFL) and Last Correct Value(LCv) methodsThese methods have been proposed to deal with timingand upsets in the correlation process. Detection of errors isrealised by the double sampling method (DS) cited in [3].The main idea of DS method is to take advantage of thetemporal nature of transient (and timing) errors, and achievedetection by observing the output signals of a given circuitat two instants. An incoherence between the two outputs isflagged when errors occur. Recovering is done by either afreezing loops or using previous correct correlation’s output.More details are given in [10].B. Tuning Loops BandwidthThe effect of time and frequency errors estimation (errorin the discriminator modules) can be greatly reduced bytuning appropriately the bandwidth of the feedback filters.This system level method gives interesting results in terms ofrobustness against errors. With no error, the modification ofthe bandwidth filter values induces only a 0.11 m of standarddeviation, with 40 % of errors at the output of the carrierdiscriminator, the standard deviation of the error in the positionincreases to 2 m while the natural design of tracking loop doesnot support more than 6% of errors [13].C. Hardware redundancyIn GPS receivers, spreading codes are generated by two10-stage LFSR (Linear feedback shift register) modules, des-ignated G1 and G2. If the LFSR register states are disturbed,then the code state becomes corrupted. To mitigate fromthis problem, methods based on error correction and modularredundancy have been proposed in [11]. These methods wereevaluated in terms of their performance benefit and gateoverhead. It has been shown, in [11], that the Hammingproposed method can provide the required reliability (in termof Mean Time To Failure (MTTF)) with 42% of gate savingscompared to the classical TMR.IV. CONCLUSIONWe have demonstrated in this paper that techniques basedon different layer of abstraction can lead to have a mutualtrade-off of system performance (quality of the position givenby the GPS receiver), hardware reliability and implementationcomplexity. An ASIC will be designed based on this results tocompare theoretical results and measured results. Additionalresults from our research on the GPS receiver chain can befound in [14].REFERENCES[1] J. Srinivasan, S. V. Adve, P. Bose, and J. A. Rivers, “The impact oftechnology scaling on lifetime reliability,” in Dependable Systems andNetworks, 2004 International Conference on, June 2004, pp. 177–186.[2] D. Ernst, N. S. Kim, S. Das, S. Pant, R. Rao, T. Pham, C. Ziesler,D. Blaauw, T. Austin, K. Flautner, and T. Mudge, “Razor: a low-powerpipeline based on circuit-level timing speculation,” in Microarchitecture,2003. MICRO-36. Proceedings. 36th Annual IEEE/ACM InternationalSymposium on, Dec 2003.[3] M. Nicolaidis, “Double-sampling architectures,” in Reliability PhysicsSymposium, 2014 IEEE International, June 2014.[4] V. Gherman, S. Evain, M. Cartron, N. Seymour, and Y. Bonhomme,“System-level hardware-based protection of memories against soft-errors,” in Design, Automation Test in Europe Conference Exhibition,2009. DATE ’09., 2009.[5] A. Ejlali, B. M. Al-Hashimi, P. Rosinger, and S. G. Miremadi, “Jointconsideration of fault-tolerance, energy-efficiency and performance inon-chip networks,” in Design, Automation Test in Europe ConferenceExhibition, 2007. DATE ’07, 2007.[6] M. Choudhury, V. Chandra, K. Mohanram, and R. Aitken, “Timber:Time borrowing and error relaying for online timing error resilience,”in Design, Automation Test in Europe Conference Exhibition (DATE),2010, 2010.[7] R. Hegde and N. R. Shanbhag, “Energy-efficient signal processing viaalgorithmic noise-tolerance,” in Low Power Electronics and Design,1999. Proceedings. 1999 International Symposium on, 1999.[8] C. Winstead, Y. Luo, E. Monzon, and A. Tejeda, “An error correctionmethod for binary and multiple-valued logic,” in Multiple-Valued Logic(ISMVL), 2011 41st IEEE International Symposium on, May 2011, pp.105–110.[9] C. Gimmler-Dumont and N. Wehn, “A cross-layer reliability designmethodology for efficient, dependable wireless receivers,” ACM Trans.Embed. Comput. Syst., vol. 13, 2014.[10] M. M. Hafidhi, E. Boutillon, and C. Winstead, “Reducing the impactof internal upsets inside the correlation process in gps receivers,” inDesign and Architectures for Signal and Image Processing (DASIP),2015 Conference on, Sept 2015, pp. 1–5.[11] ——, “Reliable gold code generators for gps receivers,” in Circuits andSystems (MWSCAS), 2015 IEEE 58th International Midwest Symposiumon, Aug 2015, pp. 1–4.[12] M. Dridi, M. M. Hafidhi, C. Winstead, and E. Boutillon, “Reliable ncocarrier generators for gps receivers,” in Design and Architectures forSignal and Image Processing (DASIP), 2015 Conference on, Sept 2015,pp. 1–5.[13] M. M. Hafidhi and E. Boutillon, “Improving the performance of thecarrier tracking loop for gps receivers in presence of transient errors dueto pvt variations,” in The International Workshop on Signal ProcessingSystems (SIPS), submitted in May 2016, pp. 1–6.[14] [Online]. Available: http://www.reliasic.cominlabs.ueb.eu/

Reliable GPS position on an unreliable hardware

Archive Ouverte en Sciences de l'Information et de la Communication

HAL Id: hal-01331034
https://hal.archives-ouvertes.fr/hal-01331034
Submitted on 13 Jun 2016
HAL is a multi-disciplinary open access
archive for the deposit and dissemination of sci-
entific research documents, whether they are pub-
lished or not. The documents may come from
teaching and research institutions in France or
abroad, or from public or private research centers.
L’archive ouverte pluridisciplinaire HAL, est
destinée au dépôt et à la diffusion de documents
scientifiques de niveau recherche, publiés ou non,
émanant des établissements d’enseignement et de
recherche français ou étrangers, des laboratoires
publics ou privés.
Reliable GPS position on an unreliable hardware
Mohamed Hafidhi, Emmanuel Boutillon
To cite this version:
Mohamed Hafidhi, Emmanuel Boutillon. Reliable GPS position on an unreliable hardware. GDR
SOCSIP, Jun 2016, Nantes, France. ￿hal-01331034￿
Reliable GPS position on an unreliable hardware
Mohamed Mourad Hafidhi and Emmanuel Boutillon
Lab-STICC, UMR 6582, Universite´ de Bretagne Sud 56100 Lorient, France
email: mohamed.hafidhi@univ-ubs.fr, emmanuel.boutillon@univ-ubs.fr
I. INTRODUCTION
There is continual motivation to reduce power consumption
and extend battery life of mobile devices. Power consumption
and device lifetime can be improved by operating at minimal
supply voltage, which increases the likelihood of hardware
errors. These errors can also be produced due to process and
temperature variations coupled with increased advancement of
CMOS technology [1]. Occurrence of errors can affect the
performance of circuits and can change the state of a gate
and the output of a system; their presence can generate a
system failure if it is not corrected. Therefore, it is increasingly
important to deal with hardware errors effects in order to keep
devices working properly.
Hardware errors can be classified into three main groups:
permanent, transient and timing errors. Permanent errors are
defined as an irreversible physical changes: a stuck at the
value 0 or 1 of a bit. They can be caused by manufacturing
defects or device wear-out. Transient errors are temporal single
malfunctions that manifest as a temporary change of the binary
value of a bit. The other term used for transient errors is Single
Event Upsets (SEU). Environmental changes, such as higher
or lower temperature and voltage variation, are the essential
sources of the occurrence of these errors. Timing errors result
when a input signal arrives too late and misses the reference
arrival of the clock.
During the last decades, reliability of circuits has been
addressed at the lower design level by proposing resilience
techniques to protect particular components. Examples are Ra-
zor flip-flops to detect signal delay errors [2], double sampling
for combinational circuits [3], error correcting codes used first
to protect memories [4], and then applied for interconnect
networks [5], and TIMBER techniques for pipeline structures
[6]. For higher design level, predictions techniques, such as
Algorithmic Noise Tolerance (ANT) technique, propose to
increase the reliability of circuit by adding a reduced precision
replica to the original function. This reduced precision replica
consumes much less power than the original function. The
final output is chosen between the original function output
and the output of the replica [7]. In extremely critical ap-
plications, such as space, avionics and healthy applications,
where the system cost is less important than its reliability,
Triple modular redundancy (TMR) is proposed on the system
level design [8]. The author of [9] propose some resilience
techniques for double-iterative Multiple-Input Multiple-Output
Bit-Interleaved Coded Modulation (MIMO BICM) receivers.
These techniques have been realised on different layers of
× ×
Incoming
Signal
Correlation function module
Integrator
10 ms
Code
generator
Carrier
NCO
Code
Filter
Carrier
Filter
Code
Discriminator
Carrier
Discriminator
Satellites
carrier
Spreading
codes
Navigation
message
[8]
[11]
[9]
[10]
Fig. 1. Top Level of the simplified tracking channel module; Error tolerance
has been already studied in components with warning marks at the output.
The corresponding proposed techniques are presented and evaluated in papers
beside each mark.
abstraction in order to have a mutual trade-off of system per-
formance, hardware reliability and implementation complexity.
Global positioning systems (GPS) can be an excellent appli-
cation to investigate the trade-off between system performance
and implementation complexity in presence of hardware er-
rors. It contains a very interesting set of different signal
processing problem with different requirements of reliability:
Correlation process, tracking loops (recursive operations), FFT
processing, state machine, Gold and carrier generators.... The
objective of the this paper1 is to address the fault tolerance
topic in the GPS context. Starting from a noiseless GPS
receiver, redundant mechanisms can be added to design a
more resilient GPS receiver in the presence of errors due
low supply voltage. An Application-specific integrated circuit
(ASIC) will be designed, using the 28 nm technology, to
compare theoretical results and measured results.
II. GPS SIGNAL PROCESSING
A GPS is a well known technology that allows determining
both the physical position and the absolute time of a receiver.
The position in time and in space is determined thanks
to a precise distance measurement with at least four GPS
satellites. GPS satellite signals are made of three components:
spreading code, navigation message and carrier. For each GPS
satellite visible in view, the GPS receiver tries to extract
the corresponding navigation message. This is accomplished
by comparing a locally generated signals (estimate of the
spreading code and the carrier of the tracked satellite) against
the received signal, then moving in time local signals until it is
time aligned with the received signal. A maximum correlation
1This work, part of the RELIASIC project, was funded by French gov-
ernment sponsors COMIN Labs and the National Research Agency in the
“Investing for the Future” program under reference ANR-10-LABX-07-01,
and the Brittany Region.
output between signals is achieved when they are aligned.
Two feedback loops are used to update the local generated
signals: the carrier tracking loop (to align the local generated
carrier in frequency ad phase) and the code tracking loop (to
align the local generated code in time). Each loop is made of
discriminators and filters. A simplified representation of the
channel tracking module is given in Fig. 1.
III. THE PROPOSED TOLERANT SCHEMA
All state of the art techniques have in common that they
requires hardware cost or/and performance penalties (reducing
system throughput). System-level technique is identified as
the key to minimize the implementation overhead for error
detection and recovery compared to low-level techniques. To
track satellites signals, GPS receivers uses feedback loops
to determine over time Doppler offsets. It has been shown
in [10]–[12], that the natural design of the tracking loops
can tolerate low rate of hardware errors with a loss of less
than 1m of error in the position given by the GPS receiver.
For moderate and high hardware error rate, we propose a
combination of low-level and system level techniques to deal
with hardware errors’ effect. In this paper, we present three
main methods proposed for the robustness of the correlation
process, discriminators and gold generators.
A. Feedback freezing loop (FFL) and Last Correct Value
(LCv) methods
These methods have been proposed to deal with timing
and upsets in the correlation process. Detection of errors is
realised by the double sampling method (DS) cited in [3].
The main idea of DS method is to take advantage of the
temporal nature of transient (and timing) errors, and achieve
detection by observing the output signals of a given circuit
at two instants. An incoherence between the two outputs is
flagged when errors occur. Recovering is done by either a
freezing loops or using previous correct correlation’s output.
More details are given in [10].
B. Tuning Loops Bandwidth
The effect of time and frequency errors estimation (error
in the discriminator modules) can be greatly reduced by
tuning appropriately the bandwidth of the feedback filters.
This system level method gives interesting results in terms of
robustness against errors. With no error, the modification of
the bandwidth filter values induces only a 0.11 m of standard
deviation, with 40 % of errors at the output of the carrier
discriminator, the standard deviation of the error in the position
increases to 2 m while the natural design of tracking loop does
not support more than 6% of errors [13].
C. Hardware redundancy
In GPS receivers, spreading codes are generated by two
10-stage LFSR (Linear feedback shift register) modules, des-
ignated G1 and G2. If the LFSR register states are disturbed,
then the code state becomes corrupted. To mitigate from
this problem, methods based on error correction and modular
redundancy have been proposed in [11]. These methods were
evaluated in terms of their performance benefit and gate
overhead. It has been shown, in [11], that the Hamming
proposed method can provide the required reliability (in term
of Mean Time To Failure (MTTF)) with 42% of gate savings
compared to the classical TMR.
IV. CONCLUSION
We have demonstrated in this paper that techniques based
on different layer of abstraction can lead to have a mutual
trade-off of system performance (quality of the position given
by the GPS receiver), hardware reliability and implementation
complexity. An ASIC will be designed based on this results to
compare theoretical results and measured results. Additional
results from our research on the GPS receiver chain can be
found in [14].
REFERENCES
[1] J. Srinivasan, S. V. Adve, P. Bose, and J. A. Rivers, “The impact of
technology scaling on lifetime reliability,” in Dependable Systems and
Networks, 2004 International Conference on, June 2004, pp. 177–186.
[2] D. Ernst, N. S. Kim, S. Das, S. Pant, R. Rao, T. Pham, C. Ziesler,
D. Blaauw, T. Austin, K. Flautner, and T. Mudge, “Razor: a low-power
pipeline based on circuit-level timing speculation,” in Microarchitecture,
2003. MICRO-36. Proceedings. 36th Annual IEEE/ACM International
Symposium on, Dec 2003.
[3] M. Nicolaidis, “Double-sampling architectures,” in Reliability Physics
Symposium, 2014 IEEE International, June 2014.
[4] V. Gherman, S. Evain, M. Cartron, N. Seymour, and Y. Bonhomme,
“System-level hardware-based protection of memories against soft-
errors,” in Design, Automation Test in Europe Conference Exhibition,
2009. DATE ’09., 2009.
[5] A. Ejlali, B. M. Al-Hashimi, P. Rosinger, and S. G. Miremadi, “Joint
consideration of fault-tolerance, energy-efficiency and performance in
on-chip networks,” in Design, Automation Test in Europe Conference
Exhibition, 2007. DATE ’07, 2007.
[6] M. Choudhury, V. Chandra, K. Mohanram, and R. Aitken, “Timber:
Time borrowing and error relaying for online timing error resilience,”
in Design, Automation Test in Europe Conference Exhibition (DATE),
2010, 2010.
[7] R. Hegde and N. R. Shanbhag, “Energy-efficient signal processing via
algorithmic noise-tolerance,” in Low Power Electronics and Design,
1999. Proceedings. 1999 International Symposium on, 1999.
[8] C. Winstead, Y. Luo, E. Monzon, and A. Tejeda, “An error correction
method for binary and multiple-valued logic,” in Multiple-Valued Logic
(ISMVL), 2011 41st IEEE International Symposium on, May 2011, pp.
105–110.
[9] C. Gimmler-Dumont and N. Wehn, “A cross-layer reliability design
methodology for efficient, dependable wireless receivers,” ACM Trans.
Embed. Comput. Syst., vol. 13, 2014.
[10] M. M. Hafidhi, E. Boutillon, and C. Winstead, “Reducing the impact
of internal upsets inside the correlation process in gps receivers,” in
Design and Architectures for Signal and Image Processing (DASIP),
2015 Conference on, Sept 2015, pp. 1–5.
[11] ——, “Reliable gold code generators for gps receivers,” in Circuits and
Systems (MWSCAS), 2015 IEEE 58th International Midwest Symposium
on, Aug 2015, pp. 1–4.
[12] M. Dridi, M. M. Hafidhi, C. Winstead, and E. Boutillon, “Reliable nco
carrier generators for gps receivers,” in Design and Architectures for
Signal and Image Processing (DASIP), 2015 Conference on, Sept 2015,
pp. 1–5.
[13] M. M. Hafidhi and E. Boutillon, “Improving the performance of the
carrier tracking loop for gps receivers in presence of transient errors due
to pvt variations,” in The International Workshop on Signal Processing
Systems (SIPS), submitted in May 2016, pp. 1–6.
[14] [Online]. Available: http://www.reliasic.cominlabs.ueb.eu/


English

Reliable GPS position on an unreliable hardwareMohamed Hafidhi, Emmanuel BoutillonTo cite this version:Mohamed Hafidhi, Emmanuel Boutillon. Reliable GPS position on an unreliable hardware.GDR SOCSIP, Jun 2016, Nantes, France. <https://colloque-socsip.ietr.fr/#page=home>.<hal-01331037>HAL Id: hal-01331037https://hal.archives-ouvertes.fr/hal-01331037Submitted on 13 Jun 2016HAL is a multi-disciplinary open accessarchive for the deposit and dissemination of sci-entific research documents, whether they are pub-lished or not. The documents may come fromteaching and research institutions in France orabroad, or from public or private research centers.L’archive ouverte pluridisciplinaire HAL, estdestine´e au de´poˆt et a` la diffusion de documentsscientifiques de niveau recherche, publie´s ou non,e´manant des e´tablissements d’enseignement et derecherche franc¸ais ou e´trangers, des laboratoirespublics ou prive´s.Reliable GPS position on an unreliable hardwareMohamed Mourad Hafidhi and Emmanuel BoutillonLab-STICC, University de Bretagne Sud, UMR 6582, 56100 Lorient, FranceOBJECTIVESThis work address the fault tolerance topic in the GPS con-text. Starting from a noiseless GPS receiver, redundant mech-anisms can be added to design a more resilient GPS receiverin the presence of errors due to process, voltage and tempera-ture (PVT) variations [1]. These mechanisms are based on dif-ferent layer of abstraction to guarantee a mutual trade-off ofsystem performance (quality of the position given by the GPSreceiver), hardware reliability and implementation complex-ity. An Application-specific integrated circuit (ASIC) will bedesigned with two versions of the GPS receiver: the standardversion, and a complex version where fault tolerant techniquesare added to make the GPS receiver more tolerant to errors.INTRODUCTION• There is continual motivation to reduce power consumption and extend battery life of mobile devices.• Power consumption and device lifetime can be improved by operating at minimal supply voltage, which increases the likelihoodof momentary/persistent faults.• GPS satellite signals are made of three components: spreading code, carrier and navigation message.• Tracking GPS satellite signals evolves three main process:– GPS receivers use, Numerically controlled oscillators (NCO), to produce a local copy of the carrier of incoming satellitesignals. Moreover, copies of spreading codes of GPS satellites are produced, locally, by two 10-stage LFSR (Linear feedbackshift register) modules, designated G1 and G2.– A correlation function is computed every 10 ms between local signals and incoming signals. A maximum correlationoutput is achieved when the two signals are time aligned.– Two feedback loops are used to update the local generated signals over time, since satellites are in continuous motion andthe receiver is also dynamic. Each loop is made of discriminators and filters.× ×IncomingSignalCorrelation function moduleIntegrator10 msCodegeneratorCarrierNCOCodeFilterCarrierFilterCodeDiscriminatorCarrierDiscriminatorSatellitescarrierSpreadingcodesNavigationmessage[10][8][6][9]Top Level of the simplified tracking channel module; Error tolerance has been already studied incomponents with warning marks at the output. The corresponding proposed techniques are presentedand evaluated in papers beside each mark.1 2 3 4 5 6 7 8 9 10+G1 outshift registermodulo-2G1 sequence generatorRELIABLE LFSRSTriple Modular Redundancy (TMR)+++v v v. . .. . .∗ ××votertriple registertriple sumA classic method with recent improvements [2–4] whereall registers, taps and sum operations are triplicated. Amajority voter is placed between each set of registersand operators. This method fails if a double-fault oc-curs in any column.Due to the cyclic nature of the LFSR, voting can be ap-plied at only one location. All errors are eventuallyshifted through the voter. This new method, namedOne-Column TMR, fails if multiple faults accumulatein the same column prior to arrival at the voter.2D Parity Checking[taps, feedback and modulo-2 sums not shown]××× ×∗Parity RegistersOriginalLFSRsParityLFSRA simpler method is achieved by using a single-parity check code. As with the ECC method, anindependent parity LFSR is produced by com-puting the parity over all bits in a column. Inaddition, a parity bit is added into each row bymodifying the LFSR structure:Error Correction Codes (ECC)[taps, feedback and modulo-2 sums not shown]decoderdecoderdecoderdecoder. . .. . .. . .. . .∗∗××OriginalLFSRsParityLFSRsBased on a general method for encoding multiple LF-SRs [5], the G1 LFSRs are arranged in a matrix whereeach row is an LFSR. Columns are encoded using a(7, 4) Hamming code, yielding three parity bits in eachcolumn. The parity rows now constitute independentLFSRs with the same taps as the original G1 registers.To correct errors, a syndrome decoder is placed aftereach column. This method is able to correct a singleerror in each column. The full ECC method can be sim-plified by using a decoder in only one column. All er-rors eventually pass through the decoder and may becorrected.Evaluation: Mean Time to Failure (MTTF)Each method will fail under a variety of fault patterns.Since the GPS Gold sequences have a period of 1023,the LFSRs can be reset to a known state each period.Hence reliable function is needed for at least 1023clock cycles. MTTF was solved for each method us-ing the analytical techniques described in [6]. Logicsynthesis was done to express complexity in terms ofequivalent NAND gates for each case.Results60 80 100 120 140 160 180 200 220 240102103104Complexity (NAND equivalent)MTTFUnprotectedParityHammingHamming (one col.)TMR (one col.)TMR10−5 10−4 10−3 10−2100101102103104105106107Probability of an upset in one flip flopMTTFUnprotectedParityHamming (one col.)TMRTMR (one col.)HammingThe best choice depends on the technology’s up-set probability: For high upset probability, thefull Hamming or TMR method may be necessaryto achieve an acceptable MTTF. For a moderateupset probability, the the Hamming (one col.)method provides the required MTTF, and reducesgate complexity by 42% compared to TMR.RELIABLE CARRIER DISCRIMINATOR• Tuning the carrier filter bandwidthyields to an important improvementin the robustness of GPS trackingloops against faults in the carrier dis-criminator computation.• With 40 % of upset errors, the errorin the position between the noiselessand the noisy GPS receiver, σX(p),does not exceed 2m while the refer-ence GPS receiver does not supportmore than 6 % of errors [7]. 10−3 10−2 10−1 10010−2100102104106108Probability of a fault in the output of the Carrier discriminator σX(p)   Noisy GPS ReceiverNoisy GPS Receiver + Technique of resilienceDESCRIPTION OF THE SIMULATION PLATFORMThe GPS receiver algorithm was first designed with the MATLAB high level software. Then, an implementation of the GPS receiveralgorithm is done for an FPGA target to explore low level performances compared to the high level Matlab performances. Theimplemented platform can be split into three main parts:• User interface: This represents the space from where the FPGA is controlled.The interface is written by MATLAB software. Functionality given by the userinterface are: Program the FPGA with new codes, launch simulations, plotresults, display position of a GPS receiver over time using Google Earth soft-ware...• Signal source file: Signal received from more than 4 GPS satellites, over asignificant period of time, are stored in a file. This file is added then in thememory of an FPGA to replace a real-time receiving process of a GPS receiver.• FPGA target: this part will contain the hardware description of the acquisitionand the tracking algorithms for a GPS receiver. It contains also a micro-blazethat manage the communication between the user interface and the hardwaredescription of the GPS receiver.REFERENCES[1] J. Srinivasan, S. V. Adve, P. Bose, and J. A. Rivers, “Theimpact of technology scaling on lifetime reliability,” TheInternational Conference on Dependable Systems and Networks(DSN-04), 2004.[2] R. E. Lyons and W. Vanderkulk, “The use of triple-modular redundancy to improve computer reliability,”IBM J. Res. Dev., vol. 6, pp. 200–209, 1962.[3] C. Winstead, Y. Luo, E. Monzon, and A. Tejeda, “An errorcorrection method for binary and multiple-valued logic,”Multiple-Valued Logic, IEEE International Symposium on, pp.105–110, 2011.[4] C. Winstead, A. Tejeda, E. Monzon, and Y. Luo, “Error cor-rection via restorative feedback in M-ary logic circuits,” J.of Mult. Valued Logic and Soft Comp., vol. 23, no. 3–4, 2014.[5] C. Hadjicostis and G. C. Verghese, “Coding approachesto fault tolerance in linear dynamic systems,” InformationTheory, IEEE Transactions on, vol. 51, no. 1, pp. 210–228,2005.[6] M. M. Hafidhi, E. Boutillon, and C. Winstead, “Reliablegold code generators for gps receivers,” in 2015 IEEE 58thInternational Midwest Symposium on Circuits and Systems(MWSCAS), Aug 2015, pp. 1–4.[7] M. M. Hafidhi and E. Boutillon, “Improving the perfor-mance of the carrier tracking loop for gps receivers inpresence of transient errors due to pvt variations,” in TheInternational Workshop on Signal Processing Systems (SIPS),submitted in May 2016, pp. 1–6.[8] J. B.-Y. Tsui, Fundamentals of Global Positioning System Re-ceivers. Wiley-Interscience, 2000.[9] M. Dridi, M. M. Hafidhi, C. Winstead, and E. Boutil-lon, “Reliable nco carrier generators for gps receivers,”in Design and Architectures for Signal and Image Processing(DASIP), 2015 Conference on, Sept 2015, pp. 1–5.[10] M. M. Hafidhi, E. Boutillon, and C. Winstead, “Reducingthe impact of internal upsets inside the correlation pro-cess in gps receivers,” in Design and Architectures for Sig-nal and Image Processing (DASIP), 2015 Conference on, Sept2015, pp. 1–5.CONTACT INFORMATIONFurther Project Information:Web http://www.reliasic.cominlabs.ueb.eu/Lab-STICC, UBS:Web http://www.reliasic.cominlabs.ueb.eu/Email mohamed.hafidhi@univ-ubs.frEmail emmanuel.boutillon@univ-ubs.frAcknowledgement:This work was funded by French government sponsorsCOMIN Labs and the National Research Agency in the “Invest-ing for the Future” program under reference ANR-10-LABX-07-01 and the Brittany Region. The authors would like to thankthe Institut Superieur de l’Aeronotique et de l’Espace (ISAE) forsharing with us VHDL codes of the GPS receiver.

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Reliable GPS position on an unreliable hardware

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