Engel, H.

Gebelein, J.

Kebschull, U.

Manz, S.

Oancea, A.

GSI Repository

ToF-ROC FPGA Irradiation Tests 2012∗S. Manz1, J. Gebelein1, A. Oancea1, H. Engel1, and U. Kebschull11Infrastruktur und Rechnersysteme in der Informationsverarbeitung (IRI), Frankfurt University, Frankfurt, GermanyIntroductionIonizing radiation can severely disturb the operation ofelectronic devices, especially SRAM based electronics likeField Programmable Gate Arrays (FPGAs). The theory ofradiation induced failures is well known and radiation mit-igation techniques have been developed [1, 2]. However,when using commercial of-the-shelf electronics the inter-nal details of electronic circuits are generally not knownand the efficiency of the mitigation techniques need to betested in experiments before the usage of those electronicscan be approved. Here we show the result of a test carriedout at the accelerator facility at the FZ Ju¨lich, Germany,in August 2012. Contrary to previous tests, our intentionwas not to characterize the chip’s internal logic cells usingan academic test design. We evaluate the efficiency of theradiation mitigation technique scrubbing on logic of an ac-tual firmware that is currently used for readout of the GET4TDC [3]. For characterizing the efficiency we do not usethe particle flux as reference but directly count the inducedupset rate in the configuration memory of a second iden-tical device in the beam. The firmware itself was runningon a Xilinx Virtex-4 FPGA operating directly in a 2GeVproton beam at a particle rate in the order of 107s−1cm−2.ResultsFigure 1 shows a direct impression of the valuesrecorded during the beam time. Both diagrams show theresults of a three hours run, where scrubbing is disabled(figure 1(a)) and enabled (figure 1(b)). The in-beam testsshowed very promising results when using the scrubbingtechnique on an operational detector read-out firmware.The dead time of the device could be reduced by almosta factor of 50 and corrupted data could be reduced by afactor of 200 while ressource utilization increased by lessthan a factor of two.OutlookWith the great efficiency of the configuration scrubber,an FPGA based read-out controller for the CBM-ToF front-end electronics is absolutely feasible.For the real CBM experiment the occurance of an SEUneeds to be logged directly in the data stream for data anal-ysis. A concept for doing so needs to be developed and ex-perimentally approved, also considering new possibilitiesthat emerge with the Xilinx series 7 FPGAs [4].∗Work supported by BMBF No. 06HD9123I.0102030405060600 620 640 660 680 700 720 740 760010k20k30k40kminutessincelastresetaccumulatedSEUsinreferenceboardtime in minutesminutes since last resetno of accumulated SEUs(a) Scrubbing is disabled. Full reset of the setup required in less than aminute. The setup is only stable when beam turned off.0102030405060400 420 440 460 480 500 520 540 560 580010k20k30k40kminutessincelastresetaccumulatedSEUsinreferenceboardtime in minutesminutes since last resetno of accumulated SEUs(b) Scrubbing is enabled. The setup runs stable for several minutes.Figure 1: The red plot refers to the number of SEUs col-lected in the reference board while the blue plot shows thetime since the last full reset of the setup, every return-to-zero of the blue plot refers to an unrecoverable failure ofthe setup caused by radiation. During the highlighted timeslots the beam was shut down for technical reasons.References[1] H. Quinn et al., “An Introduction to Radiation-InducedFailure Modes and Related Mitigation Methods For XilinxSRAM FPGAs,” Proc. Engineering of Reconfigurable Sys-tems and Algorithms, 2008[2] Mike Wirthlin, “FPGAs Operating in a Radiation Environ-ment: Lessons Learned from FPGAs in Space,” TWEPP 2012Conf., 2012[3] H. Flemming and H. Deppe, “The GSI event-driven TDCwith 4 channels GET4,” Proc. IEEE Nucl. Sci. Symp. Conf.Rec., 2009[4] 7 Series FPGAs Configuration User Guide, UG470 (v1.5),Xilinx Inc, 2012GSI SCIENTIFIC REPORT 2012 PHN-NQM-EXP-3867

ToF-ROC FPGA Irradiation Tests 2012

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ToF-ROC FPGA Irradiation Tests 2012

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