Eraud, L.

Hal - Université Grenoble Alpes

Temperature sensitivity of the AMS RICH front end chip

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Temperature sensitivity of the AMS RICH front endchipL. EraudTo cite this version:L. Eraud. Temperature sensitivity of the AMS RICH front end chip. 2002, pp.1-6. <in2p3-00012077>HAL Id: in2p3-00012077http://hal.in2p3.fr/in2p3-00012077Submitted on 20 Dec 2002HAL is a multi-disciplinary open accessarchive for the deposit and dissemination of sci-entific research documents, whether they are pub-lished or not. The documents may come fromteaching and research institutions in France orabroad, or from public or private research centers.L’archive ouverte pluridisciplinaire HAL, estdestine´e au de´poˆt et a` la diffusion de documentsscientifiques de niveau recherche, publie´s ou non,e´manant des e´tablissements d’enseignement et derecherche franc¸ais ou e´trangers, des laboratoirespublics ou prive´s.Temperature sensitivity of the AMS RICH Front End Chip02-15 ISN reportL. EraudISN GRENOBLE, for the AMS RICH collaboration1. IntroductionA Ring Imaging Cherenkov (RICH) counter for the AMS experiment [1] is underdevelopment. A first integrated circuit was designed in 1998 to process the signals from the RICHPMTs [2]. A complete study prototype, including trigger and tracker detectors as well as DAQsystem, it was implemented in [3]. This prototype was tested in laboratory with cosmic rays and abeam test was carried out at GSI Darmstadt in 1999 with a light ion beam [4]. In this preliminarydesign, single anode PMTs were used, and the front end chip was processing groups of 3 PMTs. Inorder to improve the spatial resolution of the detector (by reducing the pixel size), 16-anode PMTs(R7600-M16 model from Hamamatsu [5]) were chosen to equip the finaly count and the secondgeneration prototype. A new 16 channel chip in CMOS technology (AMS) was submitted in 2000[6]. This chip used the Austria Mikro Systeme 0.6 µm technology, it was successfully tested in thelaboratory and an engineering run was ordered in 2001. The second generation RICH prototypecurrently under test at the ISN-Grenoble is equipped with these chips.The aim of the present study was to quantify the effect of the temperature on the electronic responseof the chip, especially about a possible drift of the pedestal amplitude with temperature. The testshave been conducted on the latest of the chip version, i.e. without external current converter.2. Measurement procedureThe chip has been tested first in the dedicated test bench of the chip[7], and then with theassociated electronics and PMT on the PMT test bench. In order to perform these measurements, atemperature monitored chamber was used in which the cell including front-end electronics andPMT was placed. The range of temperature available with this type of chamber is from -40 °C to180 °C.Figure 1. Temperature test bench setupLudovic Eraud (eraud@isn.in2p3.fr), ISN Grenoble 2                                       +40°CSTOPFONCTSTARTTEMPPMT TEST BENCHTEMPERATURE MONITORED CHAMBERFRONT END ELECTRONICSThe accuracy on the value of the temperature is approximately 0.1°C after 2.5 minutes ofstabilization. A stabilisation time of 15 minutes was used. The analysis of the measurementsprovided the pedestal evolution between -30°C and 50°C.3. TEMPERATURE EFFECTSFigure 2. Temperature effects on the pedestalFigure 2 shows that an evolution of the average pedestal of -1.63 ADCchannel per degreesin gain five was observed. Such a shift, even small, could lead to some errors in the single photoelectron amplitude determination and, as a consequence, to a bad calibration of the detector. Fotthis reason, a technical solution has been considered to correct the observed drift.Ludovic Eraud (eraud@isn.in2p3.fr), ISN Grenoble 3                                       4. IMPROVEMENT AND RESULTS. In the last version of the chip, a modification has been brought on the setting of thepedestal level. In the schematics shown on figure 3, the internal resistor 'R' provides the drift of thepedestal, an injection current employed to add a DC level to the pedestal, by means of an externalresistor R1, in order to have always positive pedestal value.Figure 3. Pedestal Level Input SchematicThe improvement consists of using a diode, which brings the -2mV/°C sensitivity from thejunction to compensate the pedestal drift. Then the current mirror composed of 4 mosfets (fig 3) isgoing to be proportional to the temperature, and the negative effect of temperature driven byamplifier with resistor R will be corrected.With the same configuration for the test, a significant result has been observed. The pedestalcorrected by the diode effect is brought down to 0.39 ADCchannel/°C on average (see figure_4)i.e., a factor of about 4 smaller than with the uncorrected circuit.Ludovic Eraud (eraud@isn.in2p3.fr), ISN Grenoble 4                                       CHIP      Figure 4. Effects of the correction Once in orbit, the gradient of temperature of the detector will drift by 1 to 2 °C in 90 min.Without correcting diode, the effect of the temperature is 1 ADCchannel/°C which correspondsapproximately to 2.7% of the single photo-electron amplitude, would afect the reponse of the chip.With the diode compensation, this value droops to 0.65%.5. CONCLUSIONThe aim of the present study was to quantify the effect of the temperature on the electronicresponse of the chip, specially about a possible drift of the pedestal amplitude with temperature.The tests have been carried out the latest chip version, i.e., without external current converter.The chip has been tested with the PMT test bench associated to a temperature monitoredchamber, and measurements have been perfomed between -30°C and 50°C. The observed drift dueto the temperature of the average pedestal was about one channel per degree for gain five. Toimprove this drift, we added a diode on the pedestal level input of the chip. The diode brought asensibility of -2mV per degree in the pedestal level input, resulting in a correction of -0.39 channelper degree on the average.This study was necessary to quantify the effect of the temperature on the electronicresponse. The use of a diode improved the sensibility of the pedestal shifting between -30°C and 50°Ccorresponding to 0.76% of the single photo-electron. In this way, the calibration of the detector willnot be depending on the temperature.However, the uncorrected effect was small and with minor contribution to the driftspreading, 0.78 channel over the expected range of temperature (see the grid temperature figure 5[7]), compared to the pedestal sigma which is of the order of 4 channels, and the modification maynot be necessary. So we plan to implement the correction in the microcircuit electronics front end.Ludovic Eraud (eraud@isn.in2p3.fr), ISN Grenoble 5                                       GRID TEMPERATURE temperature griglia del rich beta 5005101520250 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6time (hr)temperature [°C]mediemassimeminimeFigure 5 a. Beta 50° is the hot casetemperature griglia del rich beta00246810121416180 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6time (hr)temperature [°CmediemassimeminimeFigure 5 b. Beta 0° is the most frequent case.Ludovic Eraud (eraud@isn.in2p3.fr), ISN Grenoble 6                                       6. REFERENCES[1] : B. Alpat et al, “Alpha Magnetic Spectrometer experiment for antimatter, darkmatter search on International Space Station”, Nuclear Physics B (Proc. Supl.) 54B1997, pp 335-343.[2] : L. Gallin-Martel, J. Pouxe, O. Rossetto, “A BiCMOS integrated charge toamplitude converter”, IEEE 1996 Nuclear Science Symposium and Medical ImagingConference, Anaheim, 3 rd -10 th November 1996.[3] : L. Gallin-Martel, J. Pouxe, O. Rossetto, P. Stassi , “Data read out and formatingfor PMT based RICH detectors”, Nucl. Inst. and Meth. A 433, 1999, pp 444-449.[4] : T. Thuillier, F. Malek, G. Boudoul, J. Ballon, A. Barrau, J. Berger, M. Buenerd,L.Gallin-Martel, A. Menchaca-Rocha, J. Pouxe, “Experimental study of a proximityCherenkov counter prototype for the AMS experiment”, ISN report 01-89, January2002; astro-ph/0201051[5] :More details can be found at the following address : http://www.hamamatsu.fr/[6] : L. Gallin-Martel, J. Pouxe, O. Rossetto, M. Yamouni, “A 16 channel analogintegrated circuit for PMT pulses processing”, ISN report 01-49, 2001.[7] : L. Eraud,  L. Gallin-Martel, “A test bench fot the Front End Chip of the AMSRICH”, ISN report 01-79, 2001.[8] : G. Sardo, Grid temperature of the rich, Carlo Gavazzi Space, 2002.Ludovic Eraud (eraud@isn.in2p3.fr), ISN Grenoble                                        

Temperature sensitivity of the AMS RICH front end chip

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