research
Computer program CORDET
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Abstract
A FORTRAN 4 computer program provides convenient simulation of an all-digital phase-lock loop (DPLL). The DPLL forms the heart of the Omega navigation receiver prototype. Through the DPLL, the phase of the 10.2 KHz Omega signal is estimated when the true signal phase is contaminated with noise. This investigation has provided a convenient means of evaluating loop performance in a variety of noise environments, and has proved to be a useful tool for evaluating design changes. The goals of the simulation are to: (1) analyze the circuit on a bit-by-bit level in order to evaluate the overall design; (2) see easily the effects of proposed design changes prior to actual breadboarding; and (3) determine the optimum integration time for the DPLL in an environment typical of general aviation conditions