The effects of 1.2 MeV gamma radiation and 20 MeV electrons on the operational characteristics of CCDs are studied. The effects of ionizing radiation on the charge transfer efficiency, dark current, and input/output circuitry are described. The improved radiation hardness of buried channel CCDs is compared to surface channel results. Both ion implanted and epitaxial layer buried channel device results are included. The advantages of using a single thickness SiO2 gate dielectric are described. The threshold voltage shifts and surface state density changes of dry, steam, and HCl doped oxides are discussed. Recent results on the recovery times and total dose effects of high dose rate pulses of 20 MeV electrons are reported

Collins, D. R.

Hartsell, G. A.

Robinson, D. A.

English

NASA Technical Reports Server

N75 2 8 8 4 2  
EFFECTS OF IONIZING RADIATION ON CCDs"- 
G. A. Hartsell, D. A. Robinson, andD. R. Collins 
Texas Instruments Incorporated 
Dallas, Texas 
The use of CCD sensors for satellite and 
deep space probes appears very attractive from 
the standpoints of size, weight, power, and reli- 
ability. One of the factors affecting CCD sensor 
reliability is the naturally occurring radiation 
levels encountered in such environments. 
paper reports the preliminary results of tests of 
the effects o f  1.2-MeV gamma radiation (Co 
source) and 20-MeV electrons (Linac source) on 
the operational characteristic s of CCDs. 
This 
60 
The effects of ionizing radiation on the 
charge transfer efficiency, dark current, and 
input/output circuitry a r e  described. 
radiation hardness of buried-channel CCDs is com- 
pared to surface -channel results. Both ion- 
implanted and epitaxial layer buried- channel 
device results a r e  included. 
using a single-thickness Si02 gate dielectric a r e  
described. 
face state density changes of dry, steam, and HCI 
doped oxides a r e  discussed. Recent results on the 
recovery times and total dose effects of high-dose- 
rate pulses of 20-MeV electrons a r e  reported. 
The improved 
The advantages of 
The threshold voltage shifts and sur - 
"-This work is being supported by the Ai r  Force Avionics Laboratory, Wright 
Patterson Ai r  Force Base under contract F33615-74-C-1054. 
21 6 
https://ntrs.nasa.gov/search.jsp?R=19750020769 2020-03-22T19:54:21+00:00Z
I. DESCRIPTION O F  TEST DEVICES 
Al l  of the CCDs tested have been 4 4 double-level aluminum metal n-channel 
devices having Si02 gate oxide and anodized aluminum interlevel metal insulation, 
These devices have a coplanar overlapping gate structure and a single-thickness 
uniform gate oxide layer, which is desirable for radiation hardness because the 
effects of oxide charge buildup are the same under all gates. 
devices were 4 4 type, they had the same gate metal and oxide structure as is 
being used in  the 3 4 double-level anodized aluminum imagers developed at 
Texas Instruments (Ref. 1). 
Although these 
The test chip design used for the test samples contains the following 
devices: 
diffusion plus source follower output and one having a simple diode output, (2) a 
MOSFET test  transistor with W / L  = 10, (3) an MOS gate oxide capacitor, and 
(4) an MOS gated diode. 
(1) two 150-bit 4 4 linear CCD shift registers, one having a precharged 
All of these can be ion-implanted o r  fabricated on epi- 
. taxial material to form buried-channel type devices. 
Two groups of test  samples have been fabricated for the two series of 
tests made to date. 
devices, oxide process variations of 950" C steam, 1100" dry, and 1100" HCL- 
grown oxides. The metallization was e -beam evaporated. Buried-channel 
devices of both the ion-implanted and epitaxial layer type were included. 
second group was mostly buried-channel type, with either 950" C steam o r  
1000" dry oxide. 
devices. 
rated metal. 
all devices tested. 
The first of these included both surface and buried-channel 
The 
Diffused chrome doping of the oxide was done on some of the 
Metallization variations were e -beam evaporated and thermally evapo - 
PSG gate oxide passivation and a nitride overcoat were used on 
II. DESCRIPTION O F  RADIATION TESTS 
Total dose gamma radiation tests were made using the Cob' radiation 
sources (=l. 2-MeV photons) at Sandia Labs in  Albuquerque and at the Nuclear 
5 Effects Laboratory, White Sands Missile Range. Dose levels ranged from 10 
rad to lo7  rad. In each of the two series of tests made, the test samples were 
connected in  parallel and biased to simulate normal operating conditions in the 
CCD so that several samples could be irradiated at the same time. 
necessary because a large number of test samples was required due to the num- 
ber of different process variations that were tested. 
This was 
Al l  the CCD and test 
21 7 
device n-diffusions were reverse biased to t24 volts, and the gates were pulsed 
with a 50% duty cycle between 0 and t8, t12, o r  t15 volts. 
The dose rate effects tests were made using the Linac source a t  the 
Nuclear Weapons Laboratory in the pulsed electron beam mode. 
width was 100 ns and electron energy was set at 20 MeV. 
tested for recovery time after pulses at dose rates of 10 , 10 , lolo and 
4 X lolo rad/sec. To measure the recovery time, it was necessary to be able 
to operate the CCD with normal bias and clock levels and remotely monitor the 
output during irradiation in the source chamber. 
to permit driving the CCD clocks through more than 50 feet of cable and moni- 
toring the output at clock rates  of up to 10 MHz. This test  equipment was also 
used for the Linac total dose test and was found to be very advantageous for 
total dose tests in that data can be easily obtained at several  dose levels for the 
same device. 
effects at different dose levels. 
The pulse 
The CCDs were 
8 9  
A special test set  was made 
This eliminates device -to -device variations when comparing 
El. EXPERIMENTAL RESULTS O F  THE TOTAL DOSE GAMMA TESTS 
Both surface- and buried-channel devices have been tested; the results 
For surface-channel devices, obtained for the two types were very different. 
the results can be summarized as follows: 
(1) At levels of lo5 rad o r  above, the charge transfer efficiency (CTE) 
was so degraded as to make the device useless. 
Relatively low dc threshold shifts occurred in  the MOSFETs. (2) 
(3 )  Large increases in CCD leakage current occurred. 
(4) The CV curves of the MOS capacitors exhibited large negative 
shifts at high frequency. 
The surface-channel CCDs had pre-irradiation charge transfer efficiencies 
of 0.9991 to 0. 9995 which decreased so much as to become unmeasurable after 
irradiation. 
1 1  volts to over 60 volts after 10 
The CV shifts were very frequency-dependent, as shown in Figure 1. 
surements indicated surface state t rap densities of over 10 per eV-cm . This 
explains the large CTE degradation seen  i n  these devices. 
in Figure 2, there was little shift i n  the MOSFET dc threshold voltage (except 
The 1.0-MHz CV curve shift for the test capacitors ranged from 
6 rad, depending on the oxide growth process. 
GV mea-  
12 2 
However, a s  shown 
218 
for the HCI-grown oxide), implying very little increase in the fixed surface 
charge. 
oxides in regard to surface state and fixed charge buildup. 
2 was initially 100-200 nA/cm 
diation. 
appreciably . 
The HC&-grown oxides were much worse than either the steam or  dry 
CCD leakage current 
and typically increased by a factor of 50 after irra- 
Leakage in the sub-threshold region for the MOSFETs also increased 
The test  results for buried-channel CCDs can be summarized as follows: 
While considerable variation has been seen, changes in  charge 
transfer inefficiency (CTI) of <5 X have been found in several 
samples after exposures of 10 6 rad. The variation of CTI frequency 
i s  not measurably changed after irradiation. 
The full-well capacity is not significantly changed. 
Large increases in  both fixed charge and surface state trapping 
effects after irradiation have been seen for devices heavily ion- 
implanted through the gate oxide. 
The surface charge buildup causes input and output threshold voltage 
shifts. 
The surface trapping states have little effect on operation of the 
buried-channel CCD but may cause significant Gm loss in the 
MOSFETs in the output circuit. 
A plot of the increase in CTI versus dose (Figure 3 )  shows wide variations, 
6 but some samples had increases of 5 X or  less  even after 10 rad. Both 
pre - and post-irradiation measurements were made without externally introduced 
fat zero. The cause of the CTI increase has not been determined. However, the 
large fixed charge buildup at  the interface may have moved the channel nearer 
the surface so that the surface state traps affected the charge transfer. 
In some devices, breakdown between the channel and the p t  channel stop 
diffusion occurs after irradiation and results in a large increase in  dark cur- 
rent. This breakdown is  attributed to the increased channel potential resulting 
from the fixed charge buildup and can be eliminated by increasing the substrate 
bias which reduces the potential between the channel and channel stop. 
21 9 
The increase in fixed oxide charge and interface trapping states was 
determined by pulsed turn-off measurements made on the buried-channel 
MOSFETs. If the gates of these depletion mode MOSFETs are  pulsed from near 
0 volts with a negative pulse VT (pulse) just large enough to overcome the poten- 
tial due to the fixed charge layer, the source-drain current will be momentarily 
cut off but will then again start to flow if there were a significant number of 
filled trapping states which can empty electrons into the channel. 
seen in  the current waveforms of Figure 4. The size of the negative gate pulse 
must be increased by an amount AVT(SS) in order to keep the channel turned off 
after the traps empty and the total number of surface state,traps involved is 
equal to AVT(SS) Cox/q, where AVT (pulse) is the change in pulsed threshold 
after exposure. From these measurements, the increase in  fixed charge after 
lo6 rad for the ion-implanted BC MOSFETs was found to be 3 to 4 X 1012/cm2 
for both wet and dry grown oxide. 
ranged from about 1 to 5 X 1012/cm2. 
This effect is 
The total number of surface state traps 
No correlation was found between the different types of oxide and the 
increase in fixed charge o r  surface states for the implanted buried-channel 
devices tested. 
proportional to the oxide capacitance, and therefore a strong correlation is 
seen between threshold shifts and oxide thickness. 
larger buildup of fixed charge in the implanted buried-channel devices has not 
been fully determined but may be due to the ion implant through the gate oxide. 
Much smaller fixed charge increases were seen in the epitaxial buried-layer 
devices, but this may be due to other factors. 
changes seen on buried-channel CCDs is less  than the threshold voltage changes 
of the MOSFETs even though both were biased the same during irradiation. 
Of course, the resulting threshold voltage shift is inversely 
The reason for the much 
The input threshold voltage 
Noise measurements were made before and after irradiation using a low- 
noise input technique (Ref. 2) and a correlated double-sampling scheme (Ref. 3)  
to reduce the noise on the output node. 
from 100-300 electrons, and the dominant source was the output source follower. 
After exposure, the noise increased by an amount equivalent to the shot noise on 
the increased leakage current. 
Before irradiation, the noise ranged 
1 
220 
IV. RESULTS O F  THE PULSE RECOVERY TESTS 
Waveforms of the CCD output during and after a 100-ns wide, 10lO-rad/sec 
Recovery to normal operating pulse of 20-MeV electrons are shown in  Figure 5. 
levels at the CCD output occurred in from 240 to 310 ps for dose rates of from 
lo8 to 4 x l o l o  rad/sec and a clock rate of 1 MHz. This recovery time can be 
divided into two parts. 
and lasts 50 to 100 ps, the CCD output diode is discharged to near substrate 
potential due to the large amount of radiation-generated charge present. 
this charge is removed by the output drain diffusions of the reset  and source fol- 
lower MOSFETs, normal output circuit levels are reestablished and the excess 
charge remaining in  the CCD channel is clocked out in  a period of about 200 ps. 
For the 4 X l o l o  rad/sec level pulses, an  increased output leakage was seen, 
which decayed with a time constant of approximately 1.0 ms. 
to be due to the thermal time constant for removal of heat generated by the large 
photocurrents which flow in the output circuit. 
During the first, which starts with the radiation pulse 
After 
This is thought 
V. LINAC TOTAL DOSE TESTS 
Total dose effects tests were made using 100-ns wide, 20-MeV electron 
pulses of about 80 rad per pulse and 10 pulses per second. The source was 
turned off and data taken at levels of 0, 5 X lo4, lo5, 3 X lo5, and 10 6 rad. 
The CCD input threshold was found to shift by 3 to 6 volts at lo6 rad, depending 
on oxide thickness. Typically, one half  of this shift had occurred at a dose of 
l o 5  rad, and little shift was seen after 5 X 105 rad. 
than that seen in  the better devices in the Co60 gamma tests. 
cally had a large increase in leakage current at about 3 X l o 5  rad, which made 
CTI measurements difficult. 
greatly reduced by increasing the substrate bias, as in the case of some of the 
Cob' irradiated devices. 
The CTI increase was more 
The devices typi- 
It was later found that this leakage current can be 
One very different result for these tests was that the source follower gain 
This is probably was degraded much less  than was the case for the Co60 tests. 
due to the fact that for a high dose rate source, the CCD output node is dis- 
charged to nearly substrate voltage by the large photocurrent during the radia- 
tion. 
irradiation compared to a gate bias of about t 2 4  volts for buried-channel devices 
in the low-dose-rate Co60 tests. 
Therefore, the gate bias on the source follower is nearly zero during 
. I  
22  1 
VI. CONCLUSIONS 
6 It seems unlikely that total dose hardness to the 10 -rad range can be 
achieved with surface-channel CCDs due to large CTE degradation caused by 
surface state trapping. However, even though several problems remain with 
the buried-channel devices tested to date, it appears that buried-channel 
devices can be made using the structure described here that wil l  give good per- 
formance after exposure to doses of up to 10 6 rad. The major problems identi- 
fied a re  input and output level shifts, increased dark current and associated 
noise, and output MOSFET gain loss. 
REFERENCES 
1. G. A. Hartsell and A. R. Kmetz, "Design and Performance of a Three 
Phase Double Level Metal 160 X 100 Element CCD Imager, I '  International 
Electron Devices Meeting, December 1974, Washington, D. C. Also, 
G. A. Antcliffe, et. al., "Large Area CCD Imager for Spacecraft Appli- 
cations, ' I  Proceedings of this Symposium. 
2. S. P. Emmons and D. D. Buss, "Techniques for Introducing a Low- 
Noise Fat Zero in CCDs, '' Device Research Conference, 26-28 June 
1973, Boulder, Colorado. 
3. M. H. White, et. al., "Characterization of Surface Channel CCD Image 
Arrays at Low Light Levels, I '  LEEE J. Solid State Circuits SC-9, 1 (1974). 
222 
I I I I I I I I I I I 
- - Non- I rradiated 
6 After Gamma Dose of 10 Rad Under Positive Bias 
I I I I I I I I I I I 
-50 -40 -30 -20 -10 0 
Measurement Bias (Volts) 
E (Ave) = 6 x 16 Voltskm 
Figure 1. Curves showing CV shift with frequency for surface-channel MOS 
capacitors with HCL oxide 
223 
+2 
+1 
0 
I -1 
-2 t 
0 
0 
0 
A 
Steam 
D v  
HCI 2.5% 
HCI 5.0% A 
Total Dose (Rad) 
Figure 2. MOSFET threshold variation with gamma dose for surface-channel 
device a 
224 
100 
10 
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0 O 8V clacks 
0 12V clocks 
a 
0 
0 
0 
e 
C3 
I I I I 1  I r \ I  I I I  i I I I I  
lo5 lob 
TOTAL DOSE (RAD) 
Figure 3. Change in charge transfer inefficiency with gamma dose for 
buried-channel CCDs 
225 
Figure 4. Variation of MOSFET drain current with time due to emptying of 
surface state traps [Top trace - lD (2 maldiv), lower trace - VG. 
(10 V/div).] 
226 
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227 


Effects of ionizing radiation on CCD's

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