The micromagnetic Hall effect random access memory (MHRAM) has the potential of replacing ROMs, EPROMs, EEPROMs, and SRAMs because of its ability to achieve non-volatility, radiation hardness, high density, and fast access times, simultaneously. Information is stored magnetically in small magnetic elements (micromagnets), allowing unlimited data retention time, unlimited numbers of rewrite cycles, and inherent radiation hardness and SEU immunity, making the MHRAM suitable for ground based as well as spaceflight applications. The MHRAM device design is not affected by areal property fluctuations in the micromagnet, so high operating margins and high yield can be achieved in large scale integrated circuit (IC) fabrication. The MHRAM has short access times (less than 100 nsec). Write access time is short because on-chip transistors are used to gate current quickly, and magnetization reversal in the micromagnet can occur in a matter of a few nanoseconds. Read access time is short because the high electron mobility sensor (InAs or InSb) produces a large signal voltage in response to the fringing magnetic field from the micromagnet. High storage density is achieved since a unit cell consists only of two transistors and one micromagnet Hall effect element. By comparison, a DRAM unit cell has one transistor and one capacitor, and a SRAM unit cell has six transistors

Katti, Romney R.

Stadler, Henry L.

Wu, Jiin C.

English

NASA Technical Reports Server

5/92-22440
NON-VOLATILE, HIGH DENSITY, HIGH SPEED,
MICROMAGNET-HALL EFFECT RANDOM ACCESS MEMORY (MHRAM)
Jiin C. Wu
Center for Space Microelectronics Technology
Jet Propulsion Laboratory
California Institute of Technology
Pasadena, California 91109
Romney R. Katti
Center for Space Microelectronics Technology
Jet Propulsion Laboratory
California Institute of Technoh)gy
Pasadena, California 91109
Henry L. Stadler
Center for Space Microelectronics Technology
Jet Propulsion Laboratory
California Institute of Technology
Pasadena, California 91109
ABSTRACT
The micromagnet-Hall effect random access memory (MHRAM) has the potential of replacing ROMs, EPROMs,
EEPROMs and SRAMs because of its ability to achieve non-volatility, radiation hardness, high density, and fast
access times, simultaneously. Information is stored magnetically in small magnetic elements (micromagncts),
allowing unlimited data retention time, unlimited numbers of rewrite cycles, and inherent radiation hardness and
SEU immunity, making the MHRAM suitable for ground based as well as spaceflight applications. The
MHRAM device design is not affected by areal property fluctuations in the micromagnet, so that high operating
margins and high yield can be achieved in large-scale IC fabrication. The MHRAM has short access times (< 1(30
nsec). Write access time is short because on-chip transistors are used to gate current quickly, and magnetization
reversal in the micromagnet can occur in a few nanoseconds. Read access time is short because the high electron
mobility Hall sensor (lnAs or InSb) produces a large signal voltage in response to the fringing magnetic field from
the micromagnet. High storage density is achieved since a unit cell consists only of two transistors and one
micromagnet-I-Iall effect (M-H) element. By comparison, a DRAM unit cell has one transistor and one capacitor,
and an SRAM unit cell has six transistors.
INTRODUCTION
Ever increasing data processing requirements demand faster and denser random access memory (RAM) to keep pace
with improved CPU speed and throughput. Nonvolatility becomes an important factor in many applications
where reliability, fault tolerance and fault recoverability, and low power consumption are necessary.
Semiconductor memories such as dynamic RAM and static RAM (DRAM and SRAM) have very fast access
times, but are volatile, and batteries which could provide backup power are considered risky, unreliable, and
consume mass and volume I. EEPROMs are non-volatile, but have very long write times (on the order of mscc),
limited endurance (104 to 106 write cycles), and require compromises between refresh needs and radiation tolerance.
Shadow SRAMs, which have a regular SRAM cell and an EEPROM cell in each memory cell, are costly and still
suffer from the endurance problem of the EEPROM. Ferroelectric RAM (FRAM) offers short read and write
access times, but the data retention (nonvolatility) and the longevity of the ferroelectric material (reliability) are in
question. The magneto-resistive random access memory (MRAM2) is non-volatile and has no problem with
longevity, but has long read access times (on the order of microseconds).
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No existing nonvolatile RAM technology satisfies each of the needed data storage requirements, A summary of the
performance of these technologies, including the 256 Kbit and 1 Mbit versions of the proposed MHRAM3, is
given in Table 1. It is seen in Table 1 that MRAM and MHRAM come the closest to being the most reliable and
truly nonvolatile memories. The proposed Mt-IRAM uses a novel scheme to achieve short read access time while
retaining the other merits of the MRAM. The MHRAM therefore has the potential to replace SRAMs and all
types of ROMs, including PROMs, EPROMs, UVPROMs_d EEPROMs.
POTENTIAL APPLICATIONS
Low Cost. High Performance Reolacement for EPROMs and EEPROMs
To write to EPROMs and EEPROMs, a voltage higher than 5 V is usually needed. Special circuit and
programming sequence are needed for the write function. The write operation may take from milliseconds to
seconds. During these times, the memory content can not be read. Therefore, the write operation is usually done
with operator intervention. The reprogramming cost greatly Outweighs the cost of the chip. The EPROM and
EEPROM can only be reprogrammed for 104 to 106 times before permanent damage is done. Thus, the user must
minimize and keep track of the number of the write cycles, so that the chip can be replaced periodically. The
MFIRAM can be treated as a regular SRAM. It can be read and written just like any other main memory, using
the same instruction and memory cycle time. There is no need to limit the number of write cycles or replace the
chip periodically.
Memory_Card
Flash EEPROM is currently proposed for the memory _cardto be used in the notebook computer. Flash EEPROM
has the same drawbacks as the EEPROM, i.e_, long write time and limited number of write cycles. MHRAM can
be used to implement a fast access time and unlimited write cycle memory card.
Solid State Disk
The currently available solid state disks are implemented using SRAM. If non-,colatility is required, a battery is
used as the backup power. MHRAM can be used to implement a non-volatile solid state disk, which does not
need backup power. Solid state disk is typically used as a cache memory between the main memory and the hard
magnetic disk. A truly non-volatile solid stat e disk would relieve the system requirement to backup the content in
the solid state disk to the hard disk during power down.
Main Memory_
Using MHRAM to implement the main memory can have a profound effect on the computer system. Since the
content of the main memory is not lost after the power is lost, the computer can resume its computation after the
power has been reinstalled. There will be no need to use the write-through scheme in managing the memory
hierarchy, the more efficignt write-back scheme can be used without worrying the loss of data due to power failure.
There will be other impacts when such a non-volatile memo_ isavailable.
MHRAM CELL STRUCTURE
A high speed, non-volatile random access memory cell can be achieved by a micromagnet-Hal! effect _--_
element whose structure is shown in Fig. 1. The M-H element consists of a ferromagnetic element (called
micromagnet), shown as the right-slanted area, and a Hall effect sensor, shown as the shaded area. The
non-volatile storage function is realized with a micromagnet having an in-plane, uniaxial anisotropy, and, very
importantly, in-plane, bipolar remanent magnetization states. The information stored in the micromagnet is
detected by a Hall effect sensor which senses the fringing field from the micromagnet. As shown in Fig. 1, when
140
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the magnetization in the micromagnet is pointing to the right, a current flowing from lead 3 to lead 4 in the Hall
sensor would produce a Hall voltage across leads 1 and 2, with lead 2 being positive with respect to lead 1. When
the magnetization in the micromagnet is reversed to point to the left, the same current in the Hall sensor would
produce a Hall voltage with the same magnitude but the lead 1 becomes positive. Such a reversal in polarity
between the two leads can be detected easily by a differential sense amplifier.
The micromagnet can be magnetized by a local applied field, whose direction is used to form either a "0" or "1"
state. The micromagnet remains in the "0" or "1" state until a switching field is applied to change its state,
therefore achieving nonvolatility. The micromagnet is magnetized within a few nanoseconds or less, so the write
cycle time is very short. The Hall voltage is produced across leads 1 and 2 within a nanosecond. Since this is a
differential signal, the settling time of the sense amplifier is short. Both the read and write access times can be
within 100 nsec.
MEMORY ORGANIZATION
One organization for a 2x2 bit MHRAM is shown schematically in Fig. 2. The M-H elements are incorporated in
a matrix of gating transistors. Micromagnets are shown as rectangles, and Hall sensors are shown as shaded
regions. Consider the cell, MH-21, which occurs at the intersection of the second row and the first column. To
read the content of MH-21, signals RS2 (Row Select 2), CS1 (Column Select 1), and Read become high.
Transistors Q7, Q9, and Q13 are turned on by RS2, which sends a current through, and produces a Hall voltage at,
every Hall sensor in the second row. Each Hall voltage is amplified by a sense amplifier at the corresponding
column. However, only transistor Q1 has been turned on (by CS1 AND Read), so that only the signal output
from sensor 21 is connected to the final output, Vou t. Although transistor Q8 is also turned on when the second
row is selected, since none of the transistors Q2, Q3, Q10, and Q11 are turned on, current does not flow through
Q8. If a single-output memory organization is desired, the number of sense amplifiers can be reduced to one if the
selection transistors (such as Q1) are placed at the input side of the sense amplifier.
To write to cell MH-21, signals RS2, CS1, and Write become high. If the bit value to be written is a "I," then
transistors Q3, Q8 and Q11 are turned on, and if the bit value is a "0," then transistors Q2, Q8 and Q10 are turned
on. The bit value then decides the sense of the current through the conductor over the magnetic element, and
therefore the sense of the in-plane magnetization. It is noted that the switching current amplitude can be set to
accommodate the micromagnet with the highest switching threshold among the matrix of micromagnets. This is
because the switching field is applied only to the selected micromagnet and, unlike the MRAM and core memory,
will not have a half-select problem. Therefore the writing process achieves high margin and is immune to
fluctuations in the switching threshold value, caused for example by material variations, so that high chip yields
can be achieved.
READ-OUT SIGNAL LEVEL
One of the critical memory performance parameters is the read-out signal level. The output voltage of the Hall
sensor, Vout, is given by:
Vout = I.t Vx Bz W/L, (i)
where Ix is the Hall electron mobility, Vx is the voltage drop across the Hall sensor, and W and L are the width
and length of the Hall sensor, respectively. It can be seen that the output voltage is proportional to It. Using the
value ofIt=l m2/V-s, B z = 100 Oe (0.01 Wb/m2), and W/L=I, Eq. 1 becomes
Vout = 0.01 Vx, (2)
i.e., the output is 10 mV when the voltage across the input is 1 V. If the design goal is to have a 10 mV output
voltage, with a 5 V supply, neglecting the voltage drop on the gating transistors, a maximum of 5 Hall sensors
141
can be connected in series.
MATERIALS CONSIDERATIONS
Hall Sensor:.
It can be seen from Eq. 1, that the Hail sensor's output voltage is proportional to the electron mobility of the Hall
sensor. A high electron mobility material is very desirable. At room temperature, the electron mobility in a
single crystal silicon is 0.13 m2/V-s, which is too low for this application. In a bulk single crystal gallium
arsenide (GaAs), p_0.78 m2/V-s. After doping, la=0.5 m2/V-s. In a bulk single crystal indium arsenide (InAs),
B=3.3 m2/V-s. In an MBE deposited InAs thin film, B=I.0 m2/V-s. In a bulk single crystal indium antimonide
(InSb), R=7.8 m2/V-s. In thermally evaporated InSb thin films4-9, mobility varies from 0.03 to 6 m2/V-s,
depending on the deposition and annealing conditions. Due to the high cost and low throughput of the MBE, the
evaporation and recrystallization process is clearly more practical for mass production.
It is important to note that a 1% variation in the properties of the Ha!! sensors or the micromagnets throughout
the chip only causes a 1% difference in the output voltage. This feature constitutes a significant improvement over
the MRAM2 in which a 1% variation can induce a 50% or 100% variation in output the signal is measured
differentially against a fixed reference. Therefore, the MHRAM is expected to be much more insensitive to process
variations which occur when manufacturing a large matrix memory.
The criteria for choosing the micromagnet material _¢ that it (1) can__be_switched relatively easily by a field on the
order of 100 Oe to limit on-chip power dissipation and current density, and (2) must have a stable non-zero
remanence so that it will remember its magnetization state after the switching field is removed. A larger
remanence produces a larger fringing field for the Hall sensor. Permalloy has been shown 10-12 to have a
coercivity ranging from 25 to 120 Oe. We have shown that CoPt thin films have coercivity ranging from I00 to
600 Oe. _
CONCLUSION
y
We have described a scheme using the combination of a micromagnet, Hall sensor, and gating transistors, to
achieve a high speed, non-volatile random access memory. Such a memory has the potential to replace ROMs,
EPROMs, EEPROMs, and SRAMs. We have studied the base materials needed to implement this memory.
Work is currently underway to implement an integrated circuit prototype of such a memory.
References:
L B. Gauthier, "CRAF/Cassini Subsystem Memory Maintenance (SCDT AI#307)", Jet Propulsion Laboratory
InterOffice Memorandum, 3133-90-106-BS:bs, July 11, 1990.
2. A. V. Pohm, et al., "The Design of a 1 Mbit Non-Volatile M-R Memory Chip", IEEE Trans. Magn. Vol. 24,
p. 3117 (1988).
3. J. C. Wu, H. L. Stadler, and R. R. Katti. "High Speed, N0n,V0!ati!e Random Access Memory with Magnetic
Storage and Hall Effect Sensor." Jet Propulsion Laboratory, New Technology Report, NPO-17999, November 27,
1989.
4. A. R. Clawson, "Bulk-like InSb films by hot wire zone crystallization", Thin Solid Films, Vol. 12, p. 291
(1972).
5. T. Oi, et al, "Microzone re.crystallization of InSb film for Hall effect magnetic heads", Jpn. J. Appl. Phys.,
142
Voi. 17, p. 407 (1978).
6. N. Kotera, Junji Shigeta, et al, "A low noise InSb thin film Hall element", IEEE Trans. Magn., Vol. 15, p.
1946 (1979).
7. M. Oszwaldowski, et al, "Multiple-pass zone melting of InSb thin films", Thin Solid Films, Vol. 85, p. 319
(1981).
8. J. Goc, M. Oszwaldowski, and H. Szweycer, "Dopping of InSb thin films with elements of groups II and VI",
Thin Solid Films, Vol. 142, p. 227 (1986).
9. Masaaki Isai, et al, "Influence of thickness on the galvanomagnetic properties of thin InSb films for highly
sensitive magnetoresistance elements", J. Appl. Phys., Vol. 59, p. 2845 (1986).
10. S. J. Hefferman, J. N. Chapman, and S. McVitie, "In-situ Magnetizing Experiments on Small Regular
Particles Fabricated by Electron Beam Lithography", J. Magnetism and Magnetic Materials, Vol. 83, p. 223
(1990).
11. S. McVitie and J. N. Chapman, "Magnetic Structure Determination in Small Regularly Shaped Particles",
IEEE Trans. Magn., Vol. 24, p. 1778 (1988).
12. J. F. Smyth and S. Schultz, "Hysteresis of Submicron Permailoy Particulate Arrays", J. Appl. Phys., 63 (8),
p. 4237, (1988).
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145
A 2x2 bits MHRAM Organization
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Figure 2
146


Non-volatile, high density, high speed, Micromagnet-Hall effect Random Access Memory (MHRAM)

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