制备了氧化铪(HfO2)高k介质栅SI基gE/SIgE异质结构肖特基源漏场效应晶体管(Sb-MOSfET)器件,研究了n型掺杂SI0.16gE0.84层对器件特性的影响,分析了n型掺杂SIgE层降低器件关态电流的机理。使用uHV CVd沉积系统,采用低温gE缓冲层技术进行了材料生长,首先在SI衬底上外延gE缓冲层,随后生长32 nM SI0.16gE0.84和12 nM gE,并生长1 nM SI作为钝化层。使用原子力显微镜和X射线衍射对材料形貌和晶体质量进行表征,在源漏区沉积nI薄膜并退火形成nIgE/gE肖特基结,制备的P型沟道肖特基源漏MOSfET,其未掺杂gE/SIgE异质结构MOSfET器件的空穴有效迁移率比相同工艺条件制备的硅器件的高1.5倍,比传统硅器件空穴有效迁移率提高了80%,掺杂器件的空穴有效迁移率与传统硅器件的相当。Si-based Ge /SiGe heterostructure Schottky barrier source and drain metal oxide semiconductor field effect transistors( SB-MOSFETs) with hafnium dioxide high-k gate were fabricated.The effect of the n-type doped Si 0.16 Ge 0.84 layer on the device performance was investigated,and the mechanism of the device off-state current reduction caused by the n type doping SiGe layer was analyzed.Firstly,Ge buffer was fabricated with low-temperature Ge buffer technique.Then a 32 nm Si 0.16 Ge 0.84 layer and a 12 nm Ge layer were grown on the Ge buffer in the same UHVCVD system.For comparative study, the 32 nm Si 0.16 Ge 0.84 layer was controlled undoped or n-type doped by P.For all samples,1 nm Si layer was grown to passivate the Ge surface.Atomic force microscopy and X-ray diffraction were used to characterize the surface morphology and crystal quality of the materials.NiGe / Ge Schottky junctions in source and drain were formed by nickel layer deposition and anneal.The fabricated Ge / SiGe heterosturctual MOSFET device without n-type doping shows 150% enhancement of the hole effective mobility over that of the control Si device and about 80% enhancement over the universal Si device.And the device with n-type doping shows a comparable hole effective mobility with the universal Si MOSFET device.国家自然科学基金资助项目(61036003;61176092); 国家重点基础研究发展计划(973计划)资助项目(2012CB933503;2013CB632103); 中央高校基本科研业务费资助项目(2010121056
