随着电视广播的数字化，为了保持数字视频与数字音频的同步，将数字音频及其他辅助数据按规定的方式嵌在数字视频信号的行消隐期间，使数字视音频成为统一的整体。数字演播室中，在节目制作时需要对数字音频进行监听，这就需要利用音频解嵌设备将数字音频从数字视频中提取出来，并经过数模转换设备，实现声音的播放。 监听通常只是关心各声道音频的音量大小，用人耳监听多路音频的传统方法就显得低效且不方便。为了实现用人眼直观地监看多路音频的功能，本文设计了一套系统，它除了能够对指定声道的音频进行播放，还能够将嵌入在标清和高清数字视频中的16路声道音频的音量电平大小以图像形式显示。 文中首先分析了数字音频在数字视频中的嵌...As the digitization of television broadcast, in order to keep synchronous between digital video and digital audio, digital audio and other ancillary data are embedded into horizontal blanking intervals of the digital video signal in a certain manner, which combines video and audio into one digital signal. In the production of television programs in digital studio, digital audio need to be monitore...学位：工学硕士院系专业：信息科学与技术学院电子工程系_微电子学与固体电子学学号：2312007115015

张剑锋

Xiamen University Institutional Repository

   学校编码：10384                               分类号    密级     学号：23120071150150                                     UDC         硕  士  学  位  论  文  数字演播室中音频解嵌系统的设计与实现 Design and Implementation of Audio Demuxing System for Digital Studio  张剑锋  指导教师姓名： 周剑扬  副教授 专  业  名  称： 微电子学与固体电子学 论文提交日期： 2010 年  月 论文答辩时间： 2010 年  月 学位授予日期： 2010 年  月          答辩委员会主席：                   评    阅    人：            2010 年   月 厦门大学博硕士论文摘要库厦门大学博硕士论文摘要库  厦门大学学位论文原创性声明  本人呈交的学位论文是本人在导师指导下,独立完成的研究成果。本人在论文写作中参考其他个人或集体已经发表的研究成果，均在文中以适当方式明确标明，并符合法律规范和《厦门大学研究生学术活动规范（试行）》。 另外，该学位论文为（                            ）课题（组）的研究成果，获得（               ）课题（组）经费或实验室的资助，在（               ）实验室完成。（请在以上括号内填写课题或课题组负责人或实验室名称，未有此项声明内容的，可以不作特别声明。）  声明人（签名）： 年   月   日       厦门大学博硕士论文摘要库厦门大学博硕士论文摘要库  厦门大学学位论文著作权使用声明  本人同意厦门大学根据《中华人民共和国学位条例暂行实施办法》等规定保留和使用此学位论文，并向主管部门或其指定机构送交学位论文（包括纸质版和电子版），允许学位论文进入厦门大学图书馆及其数据库被查阅、借阅。本人同意厦门大学将学位论文加入全国博士、硕士学位论文共建单位数据库进行检索，将学位论文的标题和摘要汇编出版，采用影印、缩印或者其它方式合理复制学位论文。 本学位论文属于： （     ）1.经厦门大学保密委员会审查核定的保密学位论文，于   年  月  日解密，解密后适用上述授权。 （     ）2.不保密，适用上述授权。 （请在以上相应括号内打“√”或填上相应内容。保密学位论文应是已经厦门大学保密委员会审定过的学位论文，未经厦门大学保密委员会审定的学位论文均为公开学位论文。此声明栏不填写的，默认为公开学位论文，均适用上述授权。）   声明人（签名）： 年   月   日  厦门大博硕士论文摘要库厦门大学博硕士论文摘要库摘要 I 摘  要  随着电视广播的数字化，为了保持数字视频与数字音频的同步，将数字音频及其他辅助数据按规定的方式嵌在数字视频信号的行消隐期间，使数字视音频成为统一的整体。数字演播室中，在节目制作时需要对数字音频进行监听，这就需要利用音频解嵌设备将数字音频从数字视频中提取出来，并经过数模转换设备，实现声音的播放。  监听通常只是关心各声道音频的音量大小，用人耳监听多路音频的传统方法就显得低效且不方便。为了实现用人眼直观地监看多路音频的功能，本文设计了一套系统，它除了能够对指定声道的音频进行播放，还能够将嵌入在标清和高清数字视频中的 16 路声道音频的音量电平大小以图像形式显示。  文中首先分析了数字音频在数字视频中的嵌入原理，并解析了高清数字视频中音频嵌入所遵循的标准，在此基础上得出音频解嵌的原理及基本流程；接着，结合实际的应用需求，比较分析了系统的两种硬件设计方案，并选取合适的方案通过仿真指导并实现了系统的各个硬件模块；最后，在该硬件系统的核心模块FPGA 上实现了数字音频解嵌系统，将 16 路声道的音频数据从数字视音频流中提取出来，把需要监听的声道的音频数据以 I2S 格式送给数模转换电路，同时，比较了多种音量电平的计量方法，提出并实现了一种针对数字音频的音量计算方法，将计算得到的 16 路声道的音量电平值予以输出显示，该方法具有响应速度快、转换精度高以及便于观察等优点；调试结果表明，本文设计的系统实现了对数字音频的监听监看功能，能够满足实际应用需求。  关键词：数字演播室；音频解嵌；音量电平  厦门大学博硕士论文摘要库厦门大学博硕士论文摘要库Abstract III Abstract  As the digitization of television broadcast, in order to keep synchronous between digital video and digital audio, digital audio and other ancillary data are embedded into horizontal blanking intervals of the digital video signal in a certain manner, which combines video and audio into one digital signal. In the production of television programs in digital studio, digital audio need to be monitored, so it should be demuxed from digital video signal firstly, and then converted to analog audio signal for playing.  Usually, only the volume of each audio channel is concerned. Traditional method in which multiple channels of audio should be monitored by human ears is very ineffective and inconvenient. A system is designed in this thesis to monitor multiple channels’ audio visually by human eyes. The system can play the audio of selected channel, and also it shows volume level in image for 16 channels’ audio embedded in standard and high definition digital video.  In the thesis, firstly, the audio embedding principle and embedding standard are analyzed, and then the basic processes of audio demuxing are obtained based on these theories. Secondly, the requirements of application are analyzed, and two designs of system hardware are compared, then the appropriate design is simulated and implemented. Finally, a digital audio demuxing system is implemented on the FPGA module which is the core module of the hardware. It can demux 16 channels’ digital audio data from digital video, then pass the audio data of selected channel in I2S format to digital-analog conversion circuit, meanwhile a volume level calculation method for digital audio is proposed and implemented on FPGA after comparing many volume level measure methods. The method has the advantages of fast response, high accuracy and easy observation. The calculated volume level of 16 channels’ audio is then outputted to the display circuit. The experimental results show that the system can meet the application requirements.  Keywords: digital studio; audio demuxing; volume level 厦门大学博硕士论文摘要库厦门大学博硕士论文摘要库目录 V 目  录 第 1 章 绪论 .......................................................................................... 1 1.1 数字广播视音频发展状况 ...................................................................... 1 1.2 论文研究背景及意义 .............................................................................. 2 1.3 论文的内容和架构 .................................................................................. 4 第 2 章 数字音频嵌入与解嵌原理 ...................................................... 6 2.1 AES/EBU 数字音频 ................................................................................ 6 2.1.1 AES/EBU 数字音频接口概况 .......................................................... 6 2.1.2 AES/EBU 音频数据格式 .................................................................. 7 2.2 数字音频嵌入原理 .................................................................................. 8 2.3 高清数字视频的音频嵌入标准 ............................................................ 10 2.4 高清数字音频解嵌原理 ........................................................................ 13 2.5 本章小结 ................................................................................................ 14 第 3 章 系统硬件设计与实现 ............................................................ 15 3.1 系统硬件设计方案 ................................................................................ 15 3.2 信号发生器 ............................................................................................ 17 3.3 均衡模块 ................................................................................................ 18 3.3.1 HyperLynx 仿真工具 ...................................................................... 18 3.3.2 均衡模块与串并转换模块接口仿真.............................................. 19 3.4 串并转换模块 ........................................................................................ 22 3.4.1 串并转换模块与 FPGA 模块的接口 ............................................. 22 3.4.2 接口信号的串扰分析与仿真.......................................................... 23 3.5 FPGA 模块 ............................................................................................. 27 3.6 音频数模转换模块 ................................................................................ 28 3.7 LED 驱动模块 ....................................................................................... 28 3.8 硬件系统实现 ........................................................................................ 29 3.9 本章小结 ................................................................................................ 30 第 4 章 数字音频解嵌系统的 FPGA 设计与实现 ........................... 31 厦门大学博硕士论文摘要库目录 VI 4.1 系统总体架构 ........................................................................................ 31 4.2 I2C 接收模块 .......................................................................................... 32 4.3 高清数字视频的音频解嵌模块 ............................................................ 33 4.3.1 输入状态机...................................................................................... 34 4.3.2 数据缓冲器...................................................................................... 36 4.3.3 写地址产生机制.............................................................................. 38 4.3.4 输出状态机...................................................................................... 39 4.3.5 音频解嵌模块仿真.......................................................................... 40 4.4 I2S 格式音频输出模块 .......................................................................... 41 4.4.1 I2S 总线概述 .................................................................................... 41 4.4.2 I2S 音频时序设计及仿真 ................................................................ 43 4.5 DCM 模块设计 ...................................................................................... 44 4.5.1 DCM 介绍 ....................................................................................... 45 4.5.2 时钟设计与仿真.............................................................................. 47 4.6 音量电平计算输出模块 ........................................................................ 49 4.6.1 音量电平的概念.............................................................................. 49 4.6.2 声音信号的计量.............................................................................. 50 4.6.2.1 模拟音频的计量 ..................................................................... 50 4.6.2.2 数字音频的计量 ..................................................................... 50 4.6.3 音量电平计算方法.......................................................................... 51 4.6.4 音量电平区间划分.......................................................................... 53 4.6.5 音量电平输出时序设计与仿真...................................................... 54 4.7 FPGA 资源使用情况............................................................................. 56 4.8 本章小结 ................................................................................................ 57 第 5 章 总结与展望 ............................................................................ 58 5.1 论文完成的工作与创新 ........................................................................ 58 5.2 后期工作展望 ........................................................................................ 59 参考文献 .................................................................................................. 60 致  谢 ....................................................................................................... 63 厦门大学博硕士论文摘要库目录 VII 攻读硕士学位期间发表的论文及所做工作 .......................................... 64 厦门大学博硕士论文摘要库厦门大学博硕士论文摘要库Contents IX Contents Chapter1 Introduction ............................................................................. 1 1.1 The Development of Digital Video and Audio ...................................... 1 1.2 Research Background and Meaning ..................................................... 2 1.3 Work and Organization of Thesis ......................................................... 4 Chapter2 Embedding and Demuxing Principle of Digital Audio ........ 6 2.1 AES/EBU Digital Audio .......................................................................... 6 2.1.1 Introduction of AES/EBU Digital Audio ........................................... 6 2.1.2 Data Format of AES/EBU Audio ....................................................... 7 2.2 The Embedding Principle of Digital Audio .......................................... 8 2.3 Audio Embedding Standard for HD digital Video ............................. 10 2.4 Principle of Audio Demuxing from HD digital Video ........................ 13 2.5 Summary ................................................................................................ 14 Chapter3 Design and Implementation of System Hardware ............. 15 3.1 The Design of System Hardware ......................................................... 15 3.2 Signal Generator ................................................................................... 17 3.3 Equalization Module ............................................................................. 18 3.3.1 HyperLynx Simulation Tool............................................................. 18 3.3.2 Simulation of Interface between Equalization and S/P Module ...... 19 3.4 S/P Module ............................................................................................. 22 3.4.1 The Interface between S/P and FPGA Module ................................ 22 3.4.2 Crosstalk Analysis and Simulation of Interface Signal .................... 23 3.5 FPGA Module ........................................................................................ 27 3.6 Audio D/A Module ................................................................................ 28 3.7 LED Driving Module ............................................................................ 28 3.8 The Implementation of System Hardware ......................................... 29 3.9 Summary ................................................................................................ 30 Chapter4 FPGA Implementation of Audio Demuxing System .......... 31 厦门大学博硕士论文摘要库Contents X 4.1 Architecture of System ......................................................................... 31 4.2 I2C Receiver Module ............................................................................. 32 4.3 Audio Demuxing Module For HD Digital Video ................................ 33 4.3.1 Input State Machine ......................................................................... 34 4.3.2 Audio Data Buffer ............................................................................ 36 4.3.3 Mechanism of Write Address ........................................................... 38 4.3.4 Output State Machine ...................................................................... 39 4.3.5 Simulation of Audio Demuxing Module.......................................... 40 4.4 I2S Format Audio Output Module ....................................................... 41 4.4.1 Introduction of I2S Bus .................................................................... 41 4.4.2 Design and Simulation of I2S Timing .............................................. 43 4.5 Design of DCM Module ........................................................................ 44 4.5.1 Introduction of DCM ....................................................................... 45 4.5.2 Design and Simulation of Clock ...................................................... 47 4.6 Volume Level Calculation and Output Module ................................. 49 4.6.1 Concept of Volume Level ................................................................ 49 4.6.2 Measurement of Audio ..................................................................... 50 4.6.2.1 Measurement of Analog Audio ................................................ 50 4.6.2.2 Measurement of Digital Audio ................................................ 50 4.6.3 Calculation Method of Volume Level .............................................. 51 4.6.4 Partition of Volume Level ................................................................ 53 4.6.5 Design and Simulation of Volume Level Output Timing ................ 54 4.7 Usage of FPGA Resources .................................................................... 56 4.8 Summary ................................................................................................ 57 Chapter5 Conclusions and Prospections ............................................. 58 5.1 Conclusions of Thesis ............................................................................ 58 5.2 Future Work .......................................................................................... 59 References ................................................................................................ 60 Acknowledgements ................................................................................. 63 厦门大学博硕士论文摘要库Degree papers are in the “Xiamen University Electronic Theses and Dissertations Database”. Fulltexts are available in the following ways: 1. If your library is a CALIS member libraries, please log on http://etd.calis.edu.cn/ and submitrequests online, or consult the interlibrary loan department in your library. 2. For users of non-CALIS member libraries, please mail to etd@xmu.edu.cn for delivery details.厦门大学博硕士论文摘要库

Design and Implementation of Audio Demuxing System for Digital Studio

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Design and Implementation of Audio Demuxing System for Digital Studio

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