Chemisch-mechanisches Polieren von Si-Wafern Abschlussbericht

Abstract

Goal of the project was the design, manufacturing and testing of a polisher for planarisation during the manufacturing of advanced integrated circuits (ICs). In co-operation with industrial users (Siemens AG, TEMIC, Wacker Siltronic) and Fraunhofer research institutes (FhG-ISiT, FhG-IIS/B), a new cluster tool for chemical-mechanical polishing with subsequent post-CMP cleaning has been developed. Subsequently to the design and development phase the prototype polisher has been installed at the FhG-ISiT, where it has been thoroughly tested. Parallel to the manufacturing of the prototype polishing module, the specifications of cleaner and automation modules have been defined. A prototype of the cleaning module has been installed at FhG-ISiT for testing and development purposes. In co-operation with the Fraunhofer institutes, polishing and cleaning processes have been developed. After the definition of the cluster components the cluster software, which controls the wafer flow and the communication between the cluster components, has been developed. A complete cluster, consisting of two polishers and two cleaners, has been build and delivered to TEMIC for further production tests. (orig.)Available from TIB Hannover: F97B2041+a / FIZ - Fachinformationszzentrum Karlsruhe / TIB - Technische InformationsbibliothekSIGLEBundesministerium fuer Bildung, Wissenschaft, Forschung und Technologie, Bonn (Germany)DEGerman