The aim of the research project was the elaboration of fundamentals, design methods and prototypes of design tools for big monolithical integrated systems in silicon, where the aspects output, test, signal propagation, redundancy and re-configuration were considered coherently. To that a performance simulator (WIRE) was developed and integrated into the prototype of a simulation tool based on DACAPO III. An user interface to the representation of simulation results was developed. For the calculation of redundancy a software package was developed. With its help output calculation can be performedSIGLEAvailable from TIB Hannover: FR 6696(1)+a / FIZ - Fachinformationszzentrum Karlsruhe / TIB - Technische InformationsbibliothekBundesministerium fuer Forschung und Technologie (BMFT), Bonn (Germany)DEGerman