OSTEC - Umweltvertraegliche Verfahren zur haftfesten Metallisierung von Kunststoffen. PVD/CVD-Verfahren fuer haftfeste Metallisierung Abschlussbericht

Abstract

1. Present status: Worldwide great efforts are made to lower the energy consumption and to increase the signal propagation speed of electric circuits, especially in microelectronic devices. One possibility to achieve these goals is to reduce the value of the dielectric constant of the dielectric material within the multilevel metallization. Much emphasis is put on the deposition and integration of this materials. Economic and environmental aspects are playing a major role in this development. Production status will be anticipated within the next two years. 2. Reasons/goals of the investigation: A solution must be found out under a great variety of possibilities which could fullfil the technological requirements by using already existing means; at first there must be extracted a suitable material, and then a deposition and surface conditioning process must be developed and in consequence the influence of this process on the function of the materials and the interactions with other materials must be investigated. Also some test- and measuring procedures must be selected and evaluated. 3. Methods: The low-K material (polymere) is deposited by means of a spinning process, the following heat treatment is conducted on a hot plate system. After that, in order to increase the adhesion of the consecutively sputtered metal, the surface of the polymere is conditioned by applying a plasma. The adhesion, the electrical and mechanical properties of the layer system and the surfacequalities were investigated by different analytical means. 4. Results: The goal to deposit a metal on a polymere surface at good adhesive properties and to integrate this process into a complete process scheme without deteriate the low-K qualities could be achieved acording to the requirements. 5. Applications: The state of the work progress makes it possible to integrate this process into a process to create engineering samples whose are mandatory for a product development. The range of application will reach from printed circuit boards to microelectronic devices. (orig.)Available from TIB Hannover: F99B247+a / FIZ - Fachinformationszzentrum Karlsruhe / TIB - Technische InformationsbibliothekSIGLEBundesministerium fuer Bildung, Wissenschaft, Forschung und Technologie, Bonn (Germany)DEGerman