Automatic generation of high level fault simulation models for analogue circuits

Abstract

High level modelling (HLM) for operational amplifiers (op amps) has been previously carried out successfully using models generated by published automated model generation (AMG) approaches. Furthermore, high level fault modelling (HLFM) has been shown to work reasonably well using manually designed fault models. However, no evidence shows that published AMG approaches based on op amps have been used in HLFM.This thesis describes an investigation into the development of adaptive self-tuning algorithms for automated analogue circuit modelling suitable for HLM and HLFM applications. The algorithms and simulation packages were written in MATLAB and the hardware description language - VHDL-AMS.The properties of these self-tuning algorithms were investigated by modelling a two-stage CMOS op amp and a comparator, and comparing simulations of the macromodel against those of the original SPICE circuit utilizing transient analysis.The proposed algorithms generate multiple models to cover a wide range of input conditions by detecting nonlinearity through variations in output error, and can achieve bumpless transfer between models and handle nonlinearity.This thesis describes the design, implementation and validation of these algorithms, their performance being evaluated for HLFM for both analogue and mix mode systems.HLFM results show that the models can handle both linear and nonlinear situations with good accuracy in a low-pass filter, and model digital outputs in a flash ADC correctly. Comparing with a published fault model, better accuracy has been achieved in terms of output signals using fault coverage measurement.EThOS - Electronic Theses Online ServiceGBUnited Kingdo