Errors in the chip assembly process are harder to find than errors in cell design, since they belong to no specific part of the design, but rather to the assembly as a whole.
Assembly errors are more costly than call design errors also, since they often go unnoticed until late in the design cycle. Interactive graphic tools typically require that assembly be done with primitive graphical operations, which are inappropriate far the assembly task. Language-based tools give more powerful assembly operations, but remove the two dimensional view of the chip
necessary to visualize many assembly operations.
Riot is a simple Interactive graphical tool designed to facilitate the assembly of cells into integrated systems. Riot supplies the user with primitive operations of connection -- abutment, routing and stretching - in an interactive graphic environment. Thus, the designer retains full control of the design, including the assignment of positions to instances of cells and the choice
of connection mechanism. The computer takes care of the tedious and exacting implementation detail, guaranteeing that connections are actually made. The powerful connection primitives give the user of Riot the ability to quickly assemble a custom chip from a collection of low-level
cells. This document provides a discussion of the motivation for Riot and a description of the
Riot chip assembly system, its capabilities and its use
