The 1/f noise in MOSFETs using VHP (vertical high pressure) oxynitride gate insulator was studied. The 1/f noise is degraded by conventional oxynitride gate insulators. It was found that 1/f noise can be improved by using the VHP oxynitride gate insulator

Acker, Bruce

Bloom, John

Evans, Bob

Iwai, Hiroshi

Katsuinata, Yasuhiro

Kimijima, Hideki

Kinugawa, Masaaki

Kwong, Dim-Lee

Mabuchi, Hiroyuki

Momose, Hisayo Sasaki

Morifuji, Eiji

Ohgnro, Tatsnya

Yoshitomi, Takashi

Caltech Authors - Main

9A-3 
Improvement of l/f noise by using VHP (Vertical High Pressure) oxynitride gate 
insulator for deep-sub micron RF and analog CMOS 
Hideki Kimijima, Tatsnya Ohgnro, Bob Evans*, Bruce Acker*, John Bloom*, Hiroyuki Mabuchi*, 
Dim-Lee Kwong**, Eiji Morifuji, Takashi Yoshitomi, Hisayo Sasaki Momose, 
Masaaki Kinugawa, Yasuhiro Katsuinata, and Hiroshi Iwai 
Microelectronics Engineering Laboratory, Toshiba Corporation, 
8 Shinsugita-cho, Isogo-ku, Yokohama, 235-8582. Japan 
Phone:+81-45-770-3638 Fax:+81-45-770-3575 E-inail:hideki.kimijima@toshiba.co.jp 
*GaSonics International, 2730 Junction Ave.. San Jose CA 95134-1909 
**Microelectronics Research Center, University of Texas at Austin 
ABSTRACT 
llf noise in MOSFET using VHP(Vertical High Pressure) oxyni- 
tride gate insulator was studied. llf noise is degraded by conventional 
oxynitride gate insulator. It was found that llf noise can be improved 
by using VHP oxynitride gate insulator. 
INTRODUCTION 
Oxynitride is going to be used for the gate dielectrics of deep- 
submicron dual gate CMOS because of its advantage on the suppres- 
sion of the boron penetration. 
On the other hand, market for RF and elso lower frequency analog 
CMOS is expected to rapidly grow and its requirements to the CMOS 
device characteristics have been seriously considered. In these ap- 
plications, low l/f noise is one of the key issues. As a system UI, 
these analog circuits should be implemented with digital-logic circuits 
in one chip, and hence, the analog CMOS have to common the proc- 
ess with the deep submicron logic CMOS as a base. 
We have evaluated the influence of the oxynitride gate - made by 
conventional "20 nitridation - on llf noise and found that llf noise 
of oxynitride gate CMOS is about 6dB higher than that of pure oxide 
gate for both n- and p-MOSFETs, as shown in Figs.1 and 2. In the 
PMOS case, it has been also found that llf noise in dual gate CMOS 
(p+ poly Si gate surface channel PMOS) is furthermore about 5dB 
higher than that of the single gate CMOS (n+ poly Si gate buried 
channel PMOS). Thus, llf noise of the pMOSFETs in oxynitride 
gate dual-gate CMOS can be said  to be very high. 
In order to overcome this problem, at least the llf noise degrada- 
tion caused by the use of oxynitride gate dielectrics has to be solved. 
This degradation is presumed to be caused by the accumulation of the 
nitrogen at the interface between the gate insulator and silicon. 
In order to s M  the peak position of nitrogen profde !?om the in- 
terface, VHP (Vertical High Pressure) process has been introduced 
for the formation of the oxynitride gate and llf noise improvement has 
besn investigated for the fust time. 
VHP PROCESS 
The process flow for the sample fabrication is shown in Fig.3. As 
the gate dielectrics, we prepared 3 kinds of the f h s  - pure oxide, 
oxynitride formed by conventional process, and oxynitride formed by 
VHP process as shown in Table 1. The equivalent thicknesses of aU 
the 3 gate insulators are set to 5.5 nm. Pig.4 shows schematic 
woss-section of the VHP reactor and Pig. 5 shows the time chart of 
pressure and temperature for the VHP process. The reaction time 
was controlled by the pressure in this case. 
There are a number of advantages for the VHP process. First of all. 
oxidation occurred at high pressure (>lo atm) brings much stronger 
penetration of oxidant to nitride layer than atmospheric case. Thus 
the oxide layers can easily grow beneath the nitride layer as shown in 
Fig. 6, resulting in the shift of the nitrogen peak from the interface, as 
shown in Fig.7. In the VHP case (Fig.7(a)) the nitrogen peak is at 
the oxynitride fh upper surface. The nitrogen concentration at the 
silicon interface can be estimated to be almost 0 atm % considering 
the taling effect in the SIMS profde. On the other hand, the nitrogen 
peak exists almost at the silicon interface in the conventional atmos- 
pheric process (Fig,7(b)), and the nitrogen wncentration is estimated 
to be almost 1%, even though the peak value itself - 1.2 90 - is 
smaller than the VHP case - 5 %. 
Another advantage of the VHP process is the lower temperature 
thermal process such as 700OC as shown in Table 1. Furthermore, at 
high pressure the thermal conduction though the highly dense gas be- 
comes the major mechanism of the heat transmission rather than 
thermal radiation, resulting in quite homogeneous temperature distri- 
bution, contributing in the quite uniform f h  thichess - typical sigma 
value less than 1% 
l/F NOISE CHARACTERISTICS 
llf noise characteristics of n- and p-MOSFETs are shown in 
Fis .8  and 9, respectively. While llf noise of conventional oxyni- 
tride samples was still 6dB higher than that of pure oxide, llf noise of 
the samples with VHP oxynitride reduced to the same level as the 
pure oxide, both n- and p-MOSFET cases. 
Fig.10 shows interface state density (Dit) dependence on process 
condition. Dit in VHP process is almost same as that in pure oxide, 
while that in conventional oxynitride is about two times higher. 
These results reveal that the nitrogen profile of the oxynitride gate 
dielectrics strongly affects the llf noise as well as the interface state 
density, Thus, the nitrogen profde control becomes critically impor- 
tant in the deep-sub micron mixed analog digital CMOS process. 
SUMMARY AND CONCLUSIONS 
We have shown that llf noise of n- and p-MOSFETs is degraded 
by 6dB when changing the gate dielectrics from pure oxide to conven- 
tional oxynitride according to the change from single to dual gate 
CMOS. Furthermore. llf noise of p-MOSFETs degrades by another 
5dB with the change in the channel type from the buried to the sur- 
face. 
In order to overcome the problem caused by the conventional 
oxyniwide. VHP process has been introduced for the oxynitride fh 
formation. By controlling the nitrogen prof* in the insulator, dra- 
matically good improvement of the Ilf noise to the pure gate oxide 
level has been contiumed for both n- and p-MOSFETs. 
VHP has a number of process advantage over the conventional 
atmospheric pressure oxynitridation process, such as low process 
temperature and highly uniform thermal distribution, and thus it is 
one of the most promising candidates for the deep-sub micron mixed 
analog digital CMOS. 
119 4-93081 3.93.X/99 1999 Symposium on VLSl Technology Digest of Technical Papers 
hannel ion implantation 
3 conditions 
see table 1 
SiN sidewall formation 
gate source and drain implantation 
0 Nt : As 55kd 4.OE15cn-2 
0 RTA : LOSOdegC lOsoc 
0 Pt : UP2 45keV 3.OE35on-2 
0 RTA : LOOOdsgC 2Osec 
frequency [Hzl CO salicidation 
Fig. 1 1 If noise in pure oxide and 
in oxynitride(conventional), nMOSFET 
Fig.2 I l f  noise comparision between 
buried type channel and surface type 
channel, pMOSFET 
Table 1. Process condlion of gate insulator formation Flg.3 Process flow of dual-gate CMOSFET 
with oxynitride gate dielectric VHP ProCesP 
Ioxynitridel 
conventional 
(ox~nitridel 
Pure oxide 
1st N0(50%]IN2(50%) : 700degC. 15atm. 15min 
2nd 0 2  : BOOdsgC, 25atm. 100min 
1st iO%HCI oxidation : 750dsgC. atmospheric pressure. 4.0nm 
2nd N20 : SOOdsgC, atmospheric pressure, l5min 
lO%HCi oxidation : 750dagC, atmospheric pressure, 5.5nm 
N0(5Wo/N2 (50%) 
NO ambienoe 
SiON +- 
Si sub. 
c 
02 ambience 
(High pressure) 
oxygen penetration 
gig *- 
si sub. 
Fig. 5 Pressure and temperature t h e  chart of VHP process Fig.4 Schematic croas section of VHP vesse 
Fig.6 Schematic diagram of 
::f ~~1 
I" 
3. I 
1 104: .s 
" * 
0 Lo*- 
3 Dme orlde VHP N O W 2  collvm- 
LlOrnl 
drpth [NI D a h  [ml 
Fig.10 interface state density(Dit) dependence (a) VHP prffiess (b) conventional process 
T 
-1 35 
-14n - 
5 -145 
d -150 
2 -155 
-lM 
g -165 
B 
L 4
2 -170 
-175 
IO' 103 id 
f ealeney [ I S  Fig.8 1 If noise characteristics of 0.3um nMOSFET Fig.9 l / f  noise characienstics o/d::im pMOSFET 
ISSS Symposium on VLSl Technology Digest of Technical Papers 120 


Improvement of 1/f noise by using VHP (vertical high pressure) oxynitride gate insulator for deep-sub micron RF and analog CMOS

https://authors.library.caltech.edu/28376/1/KIMvlsit99.pdf

Improvement of 1/f noise by using VHP (vertical high pressure) oxynitride gate insulator for deep-sub micron RF and analog CMOS

Abstract

Similar works

Full text

Available Versions

Caltech Authors - Main