Modern integrated circuits are among the most complex systems designed by man.
Although we have seen a rapid increase in fabrication technology, traditional
design methodologies have not evolved at a rate commensurate with the increasing
design complexity potential. These circuit design methodologies fail when applied
to Very Large Scale Integrated (VLSI) circuit design. This thesis proposes a new
design methodology which manages the complexity VLSI design, allowing
economical generation of correctly functioning circuits.
Cost is one measurement of a design methodology's value. A good design
methodology rapidly and efficiently translates high level system specifications into
working parts. Traditional techniques partition the translation process into many
steps: each design tool is focused upon one of these design steps. This partitioning
precludes the consideration of global constraints, and introduces a literal explosion
of data being transfered between design steps. The design process becomes
error-prone and time consuming.
The technique of silicon compilation presented in this thesis automatically
translates from high level specifications into correct geometric descriptions. In this
approach, the designer interacts at a high level of abstraction, and need not be
concerned with lower levels of detail, facilitating exploration of alternate system
architectures. Furthermore, since the implementation is algorithmically generated,
chip descriptions can be made correct by construction. Finally, the user is given
technology independence, because the high level specification need not require
knowledge of fabrication details. This flexibility allows the user to take advantage
of technology advances.
This thesis explores various aspects of silicon compilation, and presents a prototype
compiler, Bristle Blocks. The methodology is demonstrated through the design of
several chips. The practicality of the methodology results from the concern for
efficiency of the design process and of the chip designs produced by the system