Fabrication and electrical characterization of MONOS memory with novel high-κ gate stack

Abstract

A novel high-κ gate stack structure with HfON/SiO 2 as dual tunneling layer (DTL), AIN as charge storage layer (CSL) and HfAIO as blocking layer (BL) is proposed to prepare the charge-trapping type of MONOS non-volatile memory device by employing in-situ sputtering method. The memory window, program/erase and retention properties are investigated and compared with similar gate stack structure with Si 3N 4/SiO 2 as DTL, HfO 2 as CSL and Al 2O 3 as BL. Results show a large memory window of 3.55 V at PIE voltage of +8 V/-I5 V, high program/erase speed and good retention characteristic can be achieved using the novel Au/ HfAIO/AIN/(HfON/SiO 2)/Si gate stack structure. The main mechanisms lie in the enhanced electron injection through the high-κ HfON/SiO 2 DTL, high trapping efficiency of the high-κ AIN material and effective blocking role of the high-κ HfAIO BL. ©2009 IEEE.published_or_final_versionThe IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) 2009, Xi'an, China, 25-27 December 2009. In Proceedings of EDSSC, 2009, p. 521-52