High- k and wide-bandgap Y2 O3 was proposed as an interlayer in n-Ge metal-oxide-semiconductor (MOS) capacitor with HfTiO gate dielectric for passivating its dielectric/Ge interface, and thus improving its electrical properties and high-field reliability. Results showed that as compared to the Ge MOS capacitor with HfTiO dielectric, the sample with HfTiO/ Y2 O3 dielectric had better electrical properties such as higher dielectric constant (k=24.4), lower interface-state density, and less frequency-dependent C-V dispersion, and also better reliability with less increases in gate leakage and interface states after high-field stressing. This should be attributed to the excellent interfacial quality of Y2 O3 /Ge with no appreciable growth of unstable GeOx at the interface as confirmed by transmission electron microscopy. Moreover, Y 2 O3 can also act as a barrier against the diffusions of Ge, Hf, and Ti, thus further improving the interface quality. © 2009 American Institute of Physics.published_or_final_versio

Lai, PT

Li, CX

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TitleWide-bandgap high- k Y2 O3 as passivating interlayer forenhancing the electrical properties and high-field reliability of n-Ge metal-oxide-semiconductor capacitors with high- k HfTiOgate dielectricAuthor(s) Li, CX; Lai, PTCitation Applied Physics Letters, 2009, v. 95 n. 2Issued Date 2009URL http://hdl.handle.net/10722/124700Rights Applied Physics Letters. Copyright © American Institute ofPhysics.Wide-bandgap high-k Y2O3 as passivating interlayer for enhancing theelectrical properties and high-field reliability of n-Ge metal-oxide-semiconductor capacitors with high-k HfTiO gate dielectricC. X. Li and P. T. LaiaDepartment of Electrical and Electronic Engineering, The University of Hong Kong,Pokfulam Road, Hong KongReceived 16 May 2009; accepted 24 June 2009; published online 17 July 2009High-k and wide-bandgap Y2O3 was proposed as an interlayer in n-Ge metal-oxide-semiconductorMOS capacitor with HfTiO gate dielectric for passivating its dielectric/Ge interface, and thusimproving its electrical properties and high-field reliability. Results showed that as compared to theGe MOS capacitor with HfTiO dielectric, the sample with HfTiO /Y2O3 dielectric had betterelectrical properties such as higher dielectric constant k=24.4, lower interface-state density, andless frequency-dependent C-V dispersion, and also better reliability with less increases in gateleakage and interface states after high-field stressing. This should be attributed to the excellentinterfacial quality of Y2O3 /Ge with no appreciable growth of unstable GeOx at the interface asconfirmed by transmission electron microscopy. Moreover, Y2O3 can also act as a barrier against thediffusions of Ge, Hf, and Ti, thus further improving the interface quality. © 2009 American Instituteof Physics. DOI: 10.1063/1.3182741High-mobility semiconductor materials such as Ge andSiGe were studied to keep scaling down the size and increasethe operating speed of metal-oxide-semiconductor field-effect transistors MOSFETs. Although Ge MOSFETswith high-k gate dielectrics have been successfullydemonstrated,1–3 the quality of high-k dielectric/Ge interfaceis worse than that of the SiO2 /Si interface, mainly attributedto the parasitically grown unstable Ge oxide GeOx interfa-cial layer. In order to achieve high-quality Ge MOS devices,different surface passivation methods were researched by us-ing dielectrics such as GeOxNy,1–3 AlOxNy,4 CeO2,5 La2O3,6and TaOxNy.7 Although GeOxNy and AlOxNy interlayerswere reported to improve device quality,1–3 they might notsufficiently passivate the Ge surface,4 and also had a low kvalue 6 for GeOxNy and 9 for AlOxNy, which limitsfurther scaling possibility. TaOxNy7 was also demonstrated asan efficient interlayer for Ge MOS devices, but with a smallbandgap of 4.4 eV, it suffered from large leakage current.More recently, rare-earth oxides as CeO2 and La2O3 werestudied as the interlayer for Ge MOS capacitors. However,CeO2 had a small bandgap of 3.3 eV, which produced largegate leakage.5 Also, La2O3 absorbed moisture,8 which causedreliability problems. On the other hand, Y2O3 was a suitablecandidate for the gate dielectric of Si MOS devices due to itsrelatively high dielectric constant 14–18, high crystalli-zation temperature 2325 °C and wide bandgap5.5 eV.9,10 In this work, Y2O3 was proposed as the in-terlayer between high-k HfTiO gate dielectric and Ge sub-strate to fabricate n-Ge MOS devices with a stacked gatedielectric of HfTiO /Y2O3 for the purposes of both larger kvalue and better interface properties. Due to lack of reportson the reliability issues of Ge MOS capacitors, high-fieldreliability was also measured for the n-Ge MOS capacitors inthis work.Germanium MOS capacitors were fabricated on 100n-type substrate with a resistivity of 0.040–0.047  cm.The wafers were cleaned in organic solvent followed by arinse in 2% HF and de-ionized water for several times.7 AfterN2 blow dry, the wafers were transferred immediately to thesputtering system chamber. A thin layer 1 nm of Y2O3was deposited by sputtering of Y2O3 target on the clean Gesubstrate, followed by the deposition of 9 nm HfTiO bycosputtering of Hf and Ti targets denoted as stacked sampleas described in Ref. 11. For comparison, a control samplewith a 10 nm HfTiO but without the Y2O3 interlayer depos-ited on Ge wafer was also made denoted as non-stackedsample. For the purpose of analyzing the interface betweenY2O3 and Ge, 5 nm Y2O3 was deposited on another Gewafer denoted as N2 sample. Then, the samples receivedpostdeposition annealing PDA at 500 °C for 5 min in N2.Al was evaporated and patterned as gate electrode with anarea of 7.8510−5 cm−2. Finally, a forming-gas annealingwas performed at 300 °C for 20 min to achieve better elec-trical contacts.After fabrication of the samples, transmission electronmicroscopy TEM was used to observe the interface ofdielectric/Ge. High-frequency HF, 1 MHz capacitance-voltage C-V characteristics were measured at room tem-perature using HP4284A precision LCR meter. Gate-leakagecurrent was measured by HP4156A precision semiconductorparameter analyzer. Physical thickness of the gate dielectricswas determined by a multiwavelength ellipsometer. High-field stress at 10 MV/cm for 3600 s with the capacitorsbiased in accumulation by HP 4156A precision semiconduc-tor parameter analyzer was used to examine device reliabilityin terms of gate-leakage Jg increase and flat-voltage Vfbshift after the stress. All electrical measurements were car-ried out under a light-tight and electrically shielded condi-tion.Figure 1a shows the cross-sectional TEM picture of theY2O3 /Ge MOS capacitor annealed in N2 ambient. It isaAuthor to whom correspondence should be addressed. Electronic mail:laip@eee.hku.hk.APPLIED PHYSICS LETTERS 95, 022910 20090003-6951/2009/952/022910/3/$25.00 © 2009 American Institute of Physics95, 022910-1Downloaded 01 Feb 2011 to 147.8.21.201. Redistribution subject to AIP license or copyright; see http://apl.aip.org/about/rights_and_permissionsclearly shown that the Y2O3 /Ge interface is abrupt, smooth,and GeOx-free, similar to the Y2O3 /Ge interface in Ref. 11.The absence of GeOx should be attributed to the stability ofthe Y2O3 interlayer in contact with the Ge substrate. How-ever for the HfTiO/Ge MOS capacitor annealed in N2 ambi-ent in Fig. 1b, there is an obvious layer grown at theHfTiO/Ge interface, which consists of GeOx or GeTiOcompound.12 Figure 2 shows the C-V and I-V curves of theN2 sample and also its counterpart without PDA denoted asas-deposit sample. The distortion and hysteresis of the C-Vcurve for the as-deposited sample indicate interface and bor-der traps, respectively. Clearly for the N2 sample, both arereduced due to reduction of border and interface traps afterPDA. Moreover, the C-V curve of the N2 sample is shifted tothe right and closer to the ideal CV curve, which is associ-ated with the reduction of interfacial defects after PDA. Thegate leakage current is also greatly reduced after PDA, asshown in the inset of Fig. 2, implying enhanced interfacequality as well as improved bulk quality after the PDA.Figure 3 shows the C-V curves for the non-stackedHfTiO and stacked HfTiO /Y2O3 samples. There is asmall bump in the depletion region for the non-stackedsample, indicating some interfacial defects, while no suchdistortion occurs for the stacked sample. This could be ex-plained by the fact that Y2O3 has good interface propertieswith Ge, as mentioned above. Furthermore, Y2O3 can act asa barrier layer, which prevents Ge out-diffusion or Ti/Hfin-diffusion,11 thus suppressing the interfacial defects. Thevalues of capacitance equivalent thickness CET, flat-bandvoltage Vfb, oxide-charge density Qox, and interface-statedensity near midgap Dit estimated from the HF C-V curveby the Terman’s method13 are listed in Table I. The CET ofthe stacked sample is smaller than that of the non-stackedsample, which should be due to suppressed growth of GeOx,as shown in Fig. 1a. However, for the non-stacked sampleshown in Fig. 1b, there is an interlayer at the HfTiO/Geinterface, made of GeOx or Ge–Ti–O compound. As a result,the stacked sample has lower Dit than the non-stackedsample, ascribed to suppressed growth of GeOx and thus im-proved interface quality. Another reason for the smaller Dit isthe passivation effects of the Y2O3 interlayer, which couldfunction as a barrier layer for suppressing the Ge, Hf, and Tidiffusions.11 Qox is negative for the two samples and is pos-sibly due to the negative charges resulted from the breakingof the Hf–O bonds in the HfTiO dielectric.14 The dielectricconstant can be calculated by kdie=sio2 tdie /CET, wheresio2 is the relative permittivity of SiO2 and tdie is the physicalthickness of the dielectric. The stacked sample is found tohave a larger dielectric constant than the non-stacked sample24.4 versus 19.5 due to the suppressed growth of low-kGeOx.The inset of Fig. 3 shows the gate leakage properties ofthe two samples. It is seen that the stacked sample hassmaller gate leakage than the non-stacked sample 8.410−6 A /cm2 versus 2.5410−4 A /cm2 at Vg=Vfb+1 V.This should be due to reduced interface traps and thus re-duced trap-assisted gate leakage, as mentioned above. Figure4 shows the C-V curves of the two samples under differentfrequencies. At low frequency, some of the traps could fol-low the change of the applied voltage Vg, and thus generateadditional capacitance.15 There is a big ledge in the depletionregion for the non-stacked sample, which should be due to alarge quantity of interface states. However for the stackedsample, the C-V curve has no such ledge in the depletionregion and also less frequency dispersion, implying less in-terface states.A high-field stress 10 MV/cm is imposed on the ca-pacitors biased in the accumulation region for 3600 s to ex-amine the reliability of the samples. The leakage current andC-V curves are measured for the samples before and after thestress. The changes of gate leakage at Vg=Vfb+1 V andY2O3GlueGeGeAlHfTiOIL(b)10 nm(a)5nmFIG. 1. TEM picture for the interface of a Y2O3 /Ge and b HfTiO/Ge. ILin b indicates a layer consisting of GeOx or GeTiO grown at theHfTiO/Ge interface during the postdeposition annealing. ! " ! #"$""$%&$" ! " ! ' ( # !)* +,-.*/01!3.45647589:;!7<45<7!"#$%& "'$()*+)"'& "#,- .+ (//0-1+))+2& (//0- .+ "#,-(%3'$4+%".56<45<7=9=.>FIG. 2. High-frequency C-V curves for the N2 and the as-deposit samplesCox is the capacitance in the accumulation region. The inset shows theirgate-leakage current vs gate voltage.-2 0 2012-2 0 2-8-6-4-2 Non-stackedStackedlog(J g)(A/cm2 )Vg (V)Solid lines: accu. to inv.Dash lines: inv. to accu.Non-stackedStackedC(μF/cm2 )Vg (V)FIG. 3. High-frequency C-V curves for the stacked and non-stackedsamples. The inset shows their gate-leakage current vs gate voltage.TABLE I. Parameters of the Ge MOS capacitors. tdie is the physical thick-ness of gate dielectric measured by ellipsometry.SampleCETnmVfbVDit at midgapcm−2 eV−1Qoxcm−2tdienm kNon-stacked 2.0 0.27 4.31012 −2.21012 10.02 19.5Stacked 1.6 0.14 7.11011 −1.31012 9.96 24.4022910-2 C. X. Li and P. T. Lai Appl. Phys. Lett. 95, 022910 2009Downloaded 01 Feb 2011 to 147.8.21.201. Redistribution subject to AIP license or copyright; see http://apl.aip.org/about/rights_and_permissionsflatband voltage are 4.510−5 A /cm2 and 0.16 V, respec-tively, for the non-stacked sample, and 6.110−6 A /cm2and 0.06 V, respectively, for the stacked sample. Clearly, thenonstacked sample has larger changes of Jg and Vfb, indicat-ing more defect generation during the stress. This could beexplained by the GeOx interlayer grown at the HfTiO/Geinterface, which is unstable and easy to be damaged by high-field stress, thus generating new defects. However for thestacked sample, the insertion of a Y2O3 interlayer can effec-tively suppress the GeOx growth, thus resulting in less weakGe–O bonds and a hardened interface. Consequently, thestacked sample with a Y2O3 interlayer has excellent reliabil-ity under high-field condition.In summary, rare-earth oxide Y2O3 is investigated as apassivation layer in n-Ge MOS capacitors with high-k HfTiOgate dielectric. The Y2O3 interlayer can improve the electri-cal characteristics in terms of less C-V frequency dispersion,smaller gate leakage, and less interface states. The involvedmechanism lies in the barrier role of the Y2O3 interlayer,which effectively blocks the interdiffusions of Ge, Hf, andTi, thus suppressing the growth of unstable GeOx and im-proving the interface quality. In addition, the reliability of GeMOS capacitors with a Y2O3 interlayer is also improved, i.e.,smaller flatband-voltage shift and less gate-leakage increaseafter high-field stressing. The possible reason is that theY2O3 interlayer has good interface quality with Ge, thus in-creasing the resistance of the interface against high-fieldstressing. In a word, Y2O3 should be a promising interlayermaterial for passivating the Ge surface of Ge MOS devices.This work is financially supported by the ResearchGrants Council RGC of Hong Kong Special AdministrativeRegion HKSAR, China, under Project No. HKU 713308Eand the University Development Fund Nanotechnology Re-search Institute, 00600009 of The University of Hong Kong.1C. O. Chui, H. Kim, P. C. McIntyre, and K. C. Saraswat, IEEE ElectronDevice Lett. 25, 274 2004.2N. Wu, Q. Zhang, C. Zhu, C. C. Yeo, S. J. Whang, D. S. H. Chan, M. F.Li, B. J. Cho, A. Chin D.-L. Kwong, A. Y. Du, C. H. Tung, and N.Balasubramanian, Appl. Phys. Lett. 84, 3741 2004.3C. X. Li, P. T. Lai, and J. P. Xu, Microelectron. Eng. 84, 2340 2007.4F. Gao, S. J. Lee, J. S. Pan, L. J. Tang, and D.-L. Kwong, Appl. Phys. Lett.86, 113501 2005.5D. P. Brunco, A. Dimoulas, N. Boukos, M. Houssa, T. Conard, K. Mar-tens, C. Zhao, F. Bellenger, M. Caymax, M. Meuis, and M. M. Heyns,J. Appl. Phys. 102, 024104 2007.6G. Mavrou, S. Galata, P. Tsipas, A. Sotiropoulos, Y. Panayiotatos, A.Dimoulas, E. K. Evangelou, J. W. Seo, and Ch. Dieker, J. Appl. Phys.103, 014506 2008.7J. P. Xu, X. F. Zhang, C. X. Li, and P.T. Lai, IEEE Electron Device Lett.29, 1155 2008.8G. D. Wilk, R. M. Wallace, and J. M. Anthony, J. Appl. Phys. 89, 52432001.9Y. Zhao, K. Kita, K. Kyuno, and A. Toriumi, Appl. Phys. Lett. 94, 0429012009.10K. H. Kwon, K. L. Chang, J. K. Yang, S. G. Choi, H. J. Chang, H. Jeon,and H.-H. Park, Microelectron. Eng. 85, 1781 2008.11L. K. Chu, W. C. Lee, M. L. Huang, Y. H. Chang, L. T. Tung, C. C.Chang, Y. J. Lee, J. Kwo, and M. Hong, J. Cryst. Growth 311, 21952009.12C. X. Li, X. Zou, P. T. Lai, J. P. Xu, and C. L. Chan, Microelectron.Reliab. 48, 526 2008.13L. M. Terman, Solid-State Electron. 5, 285 1962.14A. Paskaleva, A. J. Bauer, M. Lemberger, and S. Zürcher, J. Appl. Phys.95, 5583 2004.15S. Z. Sze, Physics of Semiconductor Devices, 2nd ed. Wiley, New Delhi,1983.-2 -1 0 1 2 3012012StackedVg (V)C(μF/cm2 )1 MHz500 kHz100 kHz50 kHzNon-stackedC(μF/cm2 )1 MHz500 kHz100 kHz50 kHzFIG. 4. C-V curves measured under different frequencies for the non-stacked sample and stacked sample.022910-3 C. X. Li and P. T. Lai Appl. Phys. Lett. 95, 022910 2009Downloaded 01 Feb 2011 to 147.8.21.201. Redistribution subject to AIP license or copyright; see http://apl.aip.org/about/rights_and_permissions

Wide-bandgap high- k Y2 O3 as passivating interlayer for enhancing the electrical properties and high-field reliability of n-Ge metal-oxide-semiconductor capacitors with high- k HfTiO gate dielectric

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Wide-bandgap high- k Y2 O3 as passivating interlayer for enhancing the electrical properties and high-field reliability of n-Ge metal-oxide-semiconductor capacitors with high- k HfTiO gate dielectric

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