The effects of TCE (trichloroethylene) thermal gate oxidation on the electrical characteristics of SiC MOSFETs are investigated. It is found that TCE thermal gate oxidation can improve the I d-V d characteristics, increase the field-effect mobility, and reduce the threshold voltage and sub-threshold slope of the devices. The better device characteristics are believed to be attributed to the TCE-induced reductions of charges in the gate oxide and traps at the SiO/SiO 2 interface, and also to the gettering of charged impurities and reduction of physical defects by the chlorine incorporated in the gate oxide. ©2005 IEEE.published_or_final_versio

Lai, PT

Lin, LM

Xu, JP

Yang, BL

HKU Scholars Hub

Title Improved I-V characteristics of SiC MOSFETs by TCE thermalgate oxidationAuthor(s) Yang, BL; Lin, LM; Xu, JP; Lai, PTCitation 2005 Ieee Conference On Electron Devices And Solid-StateCircuits, Edssc, 2006, p. 803-806Issued Date 2006URL http://hdl.handle.net/10722/45916Rights Creative Commons: Attribution 3.0 Hong Kong LicenseImproved I-V Characteristics of SiC MOSFETs byTCE Thermal Gate OxidationB. L. Yang, L. M. Lin, J. P. Xu and P. T. LaiAbstract-The effects of TCE(trichloroethylene) thermal gate oxidation on theelectrical characteristics of SiC MOSFETs areinvestigated. It is found that TCE thermal gateoxidation can improve the Id-Vd characteristics,increase the field-effect mobility, and reduce thethreshold voltage and sub-threshold slope of thedevices. The better device characteristics arebelieved to be attributed to the TCE-inducedreductions of charges in the gate oxide and trapsat the SiC/SiO2 interface, and also to the getteringof charged impurities and reduction of physicaldefects by the chlorine incorporated in the gateoxide.I. INTRODUCTIONSince MOSFETs were successfully realized onthe cubic polytype SiC in the early 1980's [1], SiC-based MOSFETs and other MOS-related structureshave become a very hot research topic. SiC findsapplications in high-temperature, high-frequencyand high-power electron devices due to its widebandgap, high electron mobility and excellentthermal conductivity [2,3]. Among these studies,improving the performance of SiC MOSFETs bydifferent fabrication technologies is one importanttheme. Previous research has demonstrated that theproperties of the SiO2/SiC interface can be improvedby TCE oxidation [4, 5]. In this work, we focus onthe effects of TCE thermal gate oxidation on theelectrical characteristics of SiC MOSFET, includingits field-effect mobility, threshold voltage and sub-threshold slope.II. EXPERIMENTp-type (0001) Si-face 6H-SiC wafers with adoping concentration of 6.45xl005/cm3 and a 5-pmepitaxial layer used in this investigation wereB. L. Yang, L. M. Lin and P. T. Lai are with the department ofElectrical and Electronic Engineering, The University of HongHong, Hong Kong, E-mail: laip@eee.hku.hkJ.P. Xu is with the department of Electronic Science &Technology, Huazhoung University of Science and Technology,Wuhan 430074. P. R. China.purchased from CREE Research Inc. The waferswere cleaned using H2SO4 and the conventionalRCA method followed by a 15-s dip in 5% HFsolution. Channel length and width (L and W) were10 pm and 130 pm. 350-nm SiO2 sputtered on theSiC wafers was used as the mask for the phosphorusimplant of source and drain regions. The implantcondition was 100 keV/2.45xl015/cm2 + 60keV/1 .45x 1015 /cm2 . The implanted phosphorus wasactivated for 2 hrs at 1200 °C. 19-nm gate oxide wasgrown at 1100 °C in the control sample (in pure dry-02 ambient) and the TCE sample (in TCE plusoxygen ambient, ratio of TCE to oxygen was 0.05).The TCE vapor was added to the oxidizing ambientby a gas controller, and the amount of TCE wascontrolled by varying the flow rate of dry nitrogenthrough a bubbler filled with liquid TCE kept at 0°C. The wafers were loaded into an oxidationfurnace at 800 °C, and then the furnace temperaturewas raised to 1100 °C. The wafers were oxidized,and the grown gate oxide was annealed for 30 min.in N2 ambient at 1100 °C. Then the furnacetemperature was reduced to 800 °C at a rate of -3°C/min. Finally, after the contact holes were openedfor the source and drain, about 1-pm aluminum wasthermally evaporated on the wafers and thenpatterned as the electrodes of the MOSFETs. Thedevice parameters were measured at roomtemperature using HP 41 56A PrecisionSemiconductor Parameter Analyzer.ILL. RESUTS AND DISCUSSIONSFig. 1 shows the Id-Vd characteristics of theMOSFETs. It can be seen that Id of the TCE sampleis much larger (about 1.5 times) than that of thecontrol sample. The field-effect mobility tFE can becalculated using the following formula at a drainvoltage Vd= 0.1 V [6]:(1)dId I LUFE =dV C V Q*Wdg Co vDwwhere ld is the drain current, L the channel length,W the channel width and C0x the gate-oxide0-7803-9339-2/05/$20.00 ©2005 IEEE. 803capacitance extracted from a MOS capacitor. The2.5x10 - Vd=1OVL/W= 10/1 30for TCE2.0x10 -Vg=8V1.5x104-x (a)-17a I n1- ,,-A Va=6V2 3 4 5 6 7 8 9 10Vd (V)(a)2.5x104 -2.Oxl -1 .5x10 -1 .0x10' -5.Ox 0- -0.0o4Fig. 2 Electron mobility of the samples versus effectivegate field: (a) TCE; (b) Dry-02.0 1 2 3 4 5 6 7 8 9 10 11Vg (V)Fig. 3 Measured Id-Vg characteristics of the samples.1.4"n04.iLJW=10/1 30for Dry-02lL/W=10/1301 T-v-=lo Iiu-~~~~~~L10-718 /iQO'9~z(b) Vg=1OVVTg=8Vjgj_~~~~~Vg=6V; ' "'--~~~' '; ~Va=4Vmm., .,, .,.,*1 2 3 4 5 6 7 8 9 10 11Vd (V)01U -- - FororyOT_- ___=1--- -10-11 --. _10 -1310.13-3 -2 -1 0 1 4Vg (V)310 11(b)Fig. 1 Measured Id-Vd characteristics of the samples: (a)TCE; (b) Dry-02.-20 j < \ (a)= 15= 10 Vd=0IVI4F(MVIcm)(a)1 2 3F (MVlcm)4 5Fig. 4 Sub-threshold characteristics of the samples.dependence of JFE on effective electrical field (F)applied to the gate electrode is shown in Fig. 2 (F =(Vg - V6)/gate-oxide thickness). It can be found thatthe field-effect mobility of the TCE sample is muchhigher than that of the control sample.The threshold voltage Vt is measured byextrapolating the ld versus Vgs curve to ld = O for VD= 50 mV, as shown in Fig. 3. The value of Vt is 1.62V for the TCE sample and 3.91 V for the controlsample. Vt of TCE samples reduced about 2 V, ascompared to that of the control samples. If the oxidecharge Qox and oxide capacitance CO,X of MOSFETare measured, Vt can be determined from theformula below [7]:VK= V + 20B + aCOoxVfb msQOXCOXCoxAB kT In Naq ni(2a)(2b)(2c)where Vtb is the flat-band voltage, q the elementarycharge, Na the acceptor concentration of the SiC80411.t4035- 30C 25E020150m oE 1050LIW=1011 30for dry-02(b)IrVd=0.1Vi~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~(b)_; :9 31 bF 1.IP-IL 004..I I/substrate, esic the SiC permittivity, fms the work-function difference between aluminum-gate and 6H-SiC, k the Boltzmann constant, T the devicetemperature in Kelvin and ni the intrinsic carrierconcentration of SiC. With 4,ms = -2.53 V [5], thethird term in (2a) = 2.6 V, the fourth term in (2a) =0.4 V, V, = 1.62 V for the TCE sample and 3.91 Vfor the control sample, the oxide charge Q0x in (2b)can be calculated to be -1.3x1012 cMn2 and -3.3x1012cm-2 for the two samples respectively.The sub-threshold slope characteristics of thesamples are shown in Fig. 4. It can be observed thatthe difference between the on current and off currentis about 8 orders for a Vdrange of 0.05 - 10 V. Theinterface quality of the MOSFETs was characterizedin the weak inversion region by the slope of log(Id)versus Vg curve, which is only affected by thecapture of minority carriers by interface states [8].The sub-threshold slope can be calculated by thefollowing formula [9]:dVgsd[lg(Idg)](3a)the detailed physical mechanisms require moreinvestigations.IV. SUMMARYIn this work, a study on the effects of TCEthermal gate oxidation on the I-V characteristics ofSiC MOSFETs has been done. The experimentalresults demonstrate that TCE thermal gate oxidationcan improve the electrical characteristics, increasethe field-effect mobility, and reduce the thresholdvoltage and sub-threshold slope of the devices. Thebetter device performance should be associated withthe TCE-induced reductions of charges in the gateoxide and traps at the SiC/SiO2 interface, and alsogettering of charged impurities and removal ofphysical defects in the gate oxide. The detailedphysics involved still need further study.ACKNOWLEDGEMENTThe authors wish to thank Mr. C. L. Chan forhelp in fabricating samples. This work is financiallysupported by the RGC grant ofHong Kong.and is correlated to the density of interface states by(qT [ COX+C(+b)where CD is the capacitance of the depletion layer,and C-t represents the capacitance associated withthe interface-state density Di, = C-t/q per eV and cm2.The calculated results using (3a) show that S is 320- 531 mV/dec for the control sample and 201 211mV/dec for the TCE sample for a Vd range of 0.05 V-10 V. The S of the TCE sample is smaller (about1.5 - 1.7 times) than that of the control sample.Therefore, according to the formula (3b) that thesub-threshold slope increases with the interface-statedensity, the TCE sample should have fewer interfacestates. As a result, less carrier scattering by reducedinterface states and also oxide charges gives higherelectron mobility, as shown in Fig. 2a.It has been reported that TCE thermal oxidationcan reduce the charges in the gate oxide and thetraps at the SiC/SiO2 interface because the additionof chlorine can remove carbon clusters at theSiO2/SiC interface, getter charged impurities andreduce physical defects in the gate oxide [4, 5]. As aresult, the MOSFET has higher LFE, smaller flat-band voltage, Vt and sub-threshold slope. However,REFERENCE[1] Y.Kondo, T. Takahashi, K. Ishii, Y. Hayashi,E. Sakuma, S. Misawa, H. Daimon, M.Yamanaka, and S. Yoshida, "Experimental 3C-SiC MOSFETs," IEEE Electron Device Lett.,Vol. EDL-7, pp.404-406, 1986.[2] M. Ruff, H. Mitlehner, R. Helbig, "SiCdevices: physics and numerical simulation,"IEEE Trans. Electron Devices, Vol. 41,pplO40-1054, 1994.[3] M. Bahatnagar, B. J. Baliga. IEEE Trans.Electron Devices, Vol. 40, pp.645-655, 1993.[4] B. L. Yang, L. M. Lin, H. B. Lo, P.T. Lai."Effects of TCE concentration on oxide-chargeand interface properties of SiO2 thermallygrown on SiC," Solid-State Electronics, Vol.49, pp.1223-1227, 2005.[5] J. P. Xu, P. T. Lai, H. P. Wu, C. L. Chan.";Effects of chlorine on interfacial propertiesand reliability of SiO2 grown on 6H-SiC,"Appl. Phys. A. Vol.8 1, pp. 173-176, 2005.[6] S. Harada, R. Kosugi, J. Senzaki, W. J. Cho,K. Fukuda, K. Arai and S. Suzuki,"Relationship between channel mobility andinterface state density in SiC metal-oxide-805semiconductor field-effect transistor," J. Appl.Phys. Vol. 91, pp.1568-1571, 2002.[7] C. Hu, Semiconductor Devicesfor IntegratedCircuits, pressed by University of California atBerkeley, 2000.New York, Wiley, 1981.[8] R. J. van Overstraeten, G. Declerck, and G. L.Broux, "Inadequacy of the classical theory ofthe MOS transistor operating in weakinversion," IEEE Trans. Electron Devices,Vol. ED-20, pp.1150-1153, 1973.[9] S. M. Sze, Physics of Semiconductor Devices,806

Improved I-V characteristics of SiC MOSFETs by TCE thermal gate oxidation

http://hub.hku.hk/bitstream/10722/45916/1/128826.pdf

Improved I-V characteristics of SiC MOSFETs by TCE thermal gate oxidation

Abstract

Similar works

Full text

Available Versions

HKU Scholars Hub